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PDF LXT9784 Data sheet ( Hoja de datos )
| Número de pieza | LXT9784 | |
| Descripción | Transceiver Hardware Integrity Function Overview | |
| Fabricantes | Intel Corporation | |
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LXT9784 Octal 10/100
Transceiver Hardware Integrity
Function Overview
Application Note
January 2001
Order Number: 249188-001
As of January 15, 2001, this document replaces the Level One document known as AN123.
1 page  
LXT9784 Octal 10/100 Transceiver Hardware Integrity Function Overview
1.0
1.1
Connection Types
Cabling problems can be the cause of significant network downtime. With today’s network
manager more concerned about “Total Cost of Ownership”, features that can help solve cabling
problems provide valuable benefits. The Hardware Integrity (HWI) function incorporated into the
LXT9784 is one such feature.
The Hardware Integrity function uses transmission line theory to measure the arrival time and
electrical characteristics of the wave reflected back from an incident test wave launched on the
media. With these measurements, opens, shorts, and degraded cable quality can be located along
the wire, and lead the network manager to the location of the problem.
This document provides a theoretical overview of the HWI function implemented in the LXT9784.
Isolating Cabling Problems
When looking at cabling plant installation, it consists of many different pieces:
• The cable connection from the PC to the wall plate
• The wall plate
• The cables from the wall plate to the wiring closet
• The wiring closet patch panels
• The RJ45 connectors everywhere
• The patch cables to the network hub.
Hand-held CAT-5 UTP cable testers are frequently used to isolate cabling problems. A typical
cable test involves connecting one end of the cable to the tester, and connecting a remote node
terminator or loopback module to the other end.
Then the tester performs cable link analysis and is able to detect the following conditions:
• Short – when two or more lines are short-circuited together.
• Open – Lack of continuity between pins at both ends of the cable.
• Crossed pair – When a pair is connected to different pins at each end (i.e. Pair 1 is connected
to pins 1&2 at one end and pins 3&6 at the other).
• Reversed pair – when two lines in a pair are connected to opposite pins at each end of the
cable (i.e. the line on pin 1 is connected to pin 2 at the other end, the line on pin 2 is connected
to pin 1), also called polarity reversal.
• Distance – In addition it is able to locate the distance to an open or short and to measure cable
length.
The tester uses a technique called TDR (Time Domain Reflection) based on transmission line
theory. This technique transmits a pulse down the cable, and measures the elapsed time until it
receives a reflection from the far end of the cable.
The LXT9784 10/100 Ethernet Octal PHY device uses a similar approach. Each of the device ports
has the capability to independently detect and report cabling problems via the MII management
interface (MDIO) - without the need to unplug cables, connect test equipment or install a loopback
Application Note
5
5 Page 
LXT9784 Octal 10/100 Transceiver Hardware Integrity Function Overview
4.0 Hardware Integrity Test Function
Figure 2. HWI Test Algorithm
Phase 1: Set Phy in HWI
mode
1. Force 100Mb Technology
Write 0 2000 { force 100Mb}
2. Disable MDI-MDIX auto Detect, and set connection to
Straight through :
Write 1C 0000 { Set manual switch to straight through}
Phase 2: Ability Test
Check
1. Enable HWI mode and check HWI Ability - check that
receive channel is idle ( No activity for 100usec)
Write 1D C000 { Enable HWI mode }
{ Enable Ability check test }
Wait 100us { Wait test complete }
Read 1D
{ Check bit 14 status}
{ The bit is reset upon read }
2. If bit 14 is set, then ability test pass
move to Phase 3
Else move to Phase 4.
Write 1C 0040 { Switch MDI channel to cross-over }
Go to step 3.
Phase 3: Test cable
[ Run tests until 3
consecutive tests have
the same result,
or Max timer expired ].
1. Run test
Write 1D C000 { Execute HWI test }
Wait 100 us
Read 1D
{ Read Distance, highZ, LowZ }
{ Valid when Done bit is set }
{ Done bit is reset upon any read cycle }
2. Repeat step 1 until there are 3 consecutive
measurements of the same number or Max timer expired
. { Max Timer = 100 iterations of step 1}
3. The distance of the problem is defined in 80cm
resolution.
4. Switch to the Other cable connection.
1. Write 1C 0040 { Switch MDI channel to cross-over }
2. If two Channels were checked Disable HWI and return
to normal operation
Write 1D
0000 { Disable HWI }
Write ’0
0000 { disable force 100Mb}
Write 1C
0080 { Enable MDI/MDI-X }
Else Move to Phase 2
Application Note
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LXT9784.PDF ] | |
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