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PDF HMC1022 Data sheet ( Hoja de datos )
| Número de pieza | HMC1022 | |
| Descripción | (HMC10xx) 1- and 2-Axis Magnetic Sensors | |
| Fabricantes | HONEYWELL | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HMC1022 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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APPLICATIONS
Compassing
Navigation Systems
Attitude Reference
Traffic Detection
Medical Devices
Non-Contact Switch
SENSOR PRODUCTS
1- and 2-Axis Magnetic
Sensors
HMC1001 / 1002
HMC1021 / 1022
Configured as a 4-element
wheatstone bridge, these
magnetoresistive sensors
convert magnetic fields to
a differential output volt-
age, capable of sensing
magnetic fields as low as
30 µgauss. These MRs
offer a small, low cost,
high sensitivity and high
reliability solution for low
field magnetic sensing.
Not actual size
FEATURES AND BENEFITS
Wide Field Range Field range up to ±6 gauss, (earth’s field = 0.5 gauss)
Small Package
• Designed for 1- and 2-axis to work together to provide 3-axis (x, y, z) sensing
• 1-axis part in an 8-pin SIP or an 8-pin SOIC or a ceramic 8-pin DIP package
• 2-axis part in a 16-pin or 20-pin SOIC package
Solid State
These small devices reduce board assembly costs, improve reliability and ruggedness com-
pared to mechanical fluxgates.
On-Chip Coils
Patented on-chip set/reset straps to reduce effects of temperature drift, non-linearity errors and
loss of signal output due to the presence of high magnetic fields
Patented on-chip offset straps for elimination of the effects of hard iron distortion
Cost Effective The sensors were specifically designed to be affordable for high volume OEM applications.
1 page  
LINEAR MAGNETIC FIELD SENSORS
PACKAGE / PINOUT SPECIFICATIONS
HMC1002—Two-Axis MR Microcircuit
GND1 (A) 1
OUT+ (A) 2
OFFSET- (A) 3
Vbridge (A) 4
OUT- (A) 5
GND2 (A) 6
S/R- (B) 7
GND1 (B) 8
Out+ (B) 9
OFFSET- (B) 10
Die A
Die B
20 S/R- (A)
19 NC
18 GND PLN
17 OFFSET (+A)
16 S/R+ (A)
15 OFFSET+ (B)
14 S/R+ (B)
13 GND2 (B)
12 OUT- (B)
11 Vbridge (B)
HMC1001—One Axis MR Microcircuit
S/R+ 1
OFFSET+ 2
S/R- 3
GND 4
Out+ 5
OFFSET- 6
Vbridge 7
Out- 8
•
Die
HMC1022—Two-Axis MR Circuit
OFFSET- (A) 1
OUT+ (A) 2
VBRIDGE (A) 3
OUT- (A) 4
OUT- (B) 5
VBRIDGE (B) 6
GND (A) 7
S/R+ (B) 8
•
Die A
Die B
16 OFFSET+ (A)
15 S/R- (A)
14 S/R+ (A)
13 GND (B)
12 OUT+ (B)
11 OFFSET- (B)
10 OFFSET+ (B)
9 S/R- (B)
HMC1021S—One-Axis MR Circuit
OUT+ 1
VBRIDGE 2
GND 3
OUT- 4
•
Die
8 OFFSET-
7 OFFSET+
6 S/R-
5 S/R+
HMC1021S
HMC1021D—One-Axis MR Circuit
OUT+ 1
8 OFFSET-
Die
VBRIDGE 2
7 OFFSET+
GND 3
6 S/R-
OUT- 4
5 S/R+
HMC1021Z—One-Axis MR Circuit
OUT- 1
VBRIDGE 2
S/R+ 3
GND 4
S/R- 5
OFFSET+ 6
OFFSET- 7
OUT+ 8
•
Die
Arrow indicates direction of applied field that generates a
positive output voltage after a SET pulse.
5
5 Page 
LINEAR MAGNETIC FIELD SENSORS
5V
Clock
4 to14V
S/R
set
TPW ~ 2 µsec
-4 to -14V
reset
+5 to 6V
Clock
set rst set
200
1µF (1)
3
4 IRF7105 (2)
DI9952 (2)
HMC1022
14 8
9,15
0.1µF
5,6
2 7,8
S/R
1 (1) Tantalum, low R
(2) Rds ~0.2 ohm
Figure 13—Set/Reset Pulse With Clock Control (1021/1022)
Low Power—For low power application, down to 3.3 volt
supply, the circuit shown in Figure 15 can be used. These
low threshold FETs provide low on-resistance (0.3Ω) at
VGS=2.7V. The set/reset pulsing does not need to be
continuous. To save power, the SET pulse can be initially
applied followed by a single RESET pulse. The offset (OS)
can be calculated as:
OS = (Vset + Vrst)/2
This offset term will contain the DC offset of both the sensor
bridge and interface electronics, as well as the temperature
drift of the bridge and interface electronics. Store this value
and subtract it from all future bridge output readings. Once
the bridge is RESET, it will remain in that state for years—
or until a disturbing field (>20 gauss) is applied. A timer can
be set, say every 10 minutes, to periodically update the
offset term. A flow chart is shown in Figure 14 along with a
timing diagram in Figure 15 to illustrate this process.
SET Pulse
Read Vset
RESET Pulse
Read Vrst
OS = (Vset+Vrst)/2
Vout = Vrst - OS
Timer
y
expired?
n
Read Vrst
Figure 14—Low Power Set/Rst Flowchart
Ta Tb Ta
Tc
Reset
Set
Vout
Td
read
Vset
Vp
set
Td
read
Vrst
S/R
Ta > 5 µsec
Tb > 1 µsec
Tc > 20 µsec, 50 msec(max)
Td > 20 µsec
TPW
-Vp
reset
TPW ~ 2 µsec
Vp > 3 V
+3.3 to
6.5V
Set
Reset
200
1µF (1)
1,3
2,4
+
5,6,7,8 NDS9933
HMC1022
14 8
9,15
0.1µF
5,6,7,8
2,4
1,3 NDS8926
S/R
(1) Tantalum, low R
(2) Rds ~0.2 ohm
Figure 15—Single Clock Set/Reset Pulse Circuit (1021/1022)
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet HMC1022.PDF ] | |
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