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PDF M37150MF Data sheet ( Hoja de datos )
| Número de pieza | M37150MF | |
| Descripción | (M37150xx) SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
REJ03B0128-0100Z
SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Rev.1.00
Nov 01, 2002
1. DESCRIPTION
The M37150M6/M8/MA/MC/MF-XXXFP and M37150EFFP are
single-chip microcomputers designed with CMOS silicon gate tech-
nology. They have an OSD, data slicer, and I2C-BUS interface, mak-
ing them perfect for TV channel selection systems with a closed cap-
tion decoder. The M37150EFFP has a built-in PROM that can be
written electrically.
2. FEATURES
●Number of basic instructions .................................................... 71
●Memory size
ROM .............. 24K bytes
(M37150M6-XXXFP)
32K bytes
(M37150M8-XXXFP)
40K bytes
(M37150MA-XXXFP)
48K bytes
(M37150MC-XXXFP)
60K bytes
(M37150MF-XXXFP, M37150EFFP)
RAM ............... 1024 bytes
(M37150M6-XXXFP)
1152 bytes
(M37150M8-XXXFP)
1472 bytes
(M37150MA-XXXFP, M37150MC-XXXFP)
2048 bytes
(M37150MF-XXXFP, M37150EFFP)
(*ROM correction memory included)
●Minimum instruction execution time
................................ 0.447 µs (at 3.58 MHz oscillation frequency)
................................ 0.451 µs (at 4.43 MHz oscillation frequency)
●Power source voltage ................................................. 5 V ± 10 %
●Subroutine nesting ............................................. 128 levels (Max.)
●Interrupts ....................................................... 17 types, 16 vectors
●8-bit timers .................................................................................. 6
●Programmable I/O ports (Ports P0, P1, P2, P30, P31) ............. 25
●Serial I/O ............................................................ 8-bit ✕ 1 channel
●Multi-master I2C-BUS interface .............................. 1 (3 systems)
●A-D comparator (7-bit resolution) ................................ 8 channels
●PWM output circuit ......................................................... 8-bit ✕ 5
●Power dissipation
In high-speed mode ......................................................... 165 mW
(at VCC = 5.5V, FSCIN = 3.58 MHz, OSD on, and Data slicer on)
In low-speed mode ......................................................... 0.33 mW
(at VCC = 5.5V, 32 kHz oscillation frequency)
●Closed caption data slicer
●ROM correction function ................................................ 2 vectors
●OSD function
Display characters ................................... 32 characters ✕ 2 lines
(3 lines or more can be displayed by software)
Kinds of characters ........................................................ 254 kinds
(coloring unit)
(per charactor unit)
Character display area ............................ CC mode: 16 ✕ 26 dots
OSD mode: 16 ✕ 20 dots
Kinds of character sizes ..................................... CC mode: 1 kind
OSD mode: 8 kinds
Kinds of character colors .................................. 8 colors (R, G, B)
Coloring unit ................... character, character background, raster
Display position
Horizontal: 128 levels
Vertical: 512 levels
Attribute ........................................................................................
CC mode: smooth italic, underline, flash, automatic solid space
OSD mode: border
Smoth roll-up
Window function
3. APPLICATION
TV with closed caption decoder
Rev.1.00 Nov 01, 2002 page 1 of 139
REJ03B0128-0100Z
1 page  
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Parameter
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
Input/Output
ports
ROM M37150M6-XXXFP
M37150M8-XXXFP
M37150MA-XXXFP
M37150MC-XXXFP
M37150MF-XXXFP
RAM M37150M6-XXXFP
M37150M8-XXXFP
M37150MA-XXXFP, M37150MC-XXXFP
M37150MF-XXXFP, M37150EFFP
P0 I/O
P10–P16
I/O
P20–P27
I/O
P30, P31
I/O
Functions
71
0.447 ms (the minimum instruction execution time, at 3.58 MHz oscillation
frequency, f(XIN) = 8.95 MHz)
0.451 ms (the minimum instruction execution time, at 4.43 MHz oscillation
frequency, f(XIN) = 8.86 MHz)
8.95 MHz (maximum)
24K bytes
32K bytes
40K bytes
48K bytes
60K bytes
1024 bytes (ROM correction memory included)
1152 bytes (ROM correction memory included)
1472 bytes (ROM correction memory included)
2048 bytes (ROM correction memory included)
8-bit ✕ 1 (N-channel open-drain output structure, can be used as PWM
output pins, INT input pins, A-D input pin)
7-bit ✕ 1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P11–P14 are used as multi-master I2C-BUS inter-
face, can be used as A-D input pins, timer external clock input pins, multi-
master I2C-BUS interface)
8-bit ✕ 1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P20 and 21 are used as serial output, can be
used as serial input/output pins, timer external clock input pins, A-D input
pins, INT input pin, sub-clock input/output pins)
2-bit ✕ 1 (CMOS input/output structure, however, N-channel open-drain output structure,
when used as multi-master I2C-BUS interface, can be used as multi-master I2C-BUS interface.)
P50, P51
P52–P55
Serial I/O
Multi-master I2C-BUS interface
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
Input
Output
2-bit ✕ 1(can be used as OSD input pins)
4-bit ✕ 1(CMOS output structures, can be used as OSD output pins)
8-bit ✕ 1
One (Three lines)
8 channels (7-bit resolution)
8-bit ✕ 5
8-bit ✕ 6
2 vectors
128 levels (maximum)
<17 types>
INT external interrupt ✕ 3, Internal timer interrupt ✕ 6, Serial I/O interrupt ✕
1, OSD interrupt ✕ 1, Multi-master I2C-BUS interface interrupt ✕ 1, Data
slicer interrupt ✕ 1, f(XIN)/4096 interrupt ✕ 1, VSYNC interrupt ✕ 1, BRK
instruction interrupt ✕ 1, reset ✕ 1
Clock generating circuit
2 built-in circuits (externally connected to XCIN/OUT is a ceramic resonator
or a quartz-crystal oscillator)
Data slicer
Built-in
Rev.1.00 Nov 01, 2002 page 5 of 139
REJ03B0128-0100Z
5 Page 
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
FSCIN Pin
The FSCIN pin is a reference clock input pin. The main clock and
OSD clock are generated based on the reference clock from the
FSCIN pin. The sub clock can also be generated directly from the 32
kHz oscillator circuit and FSCIN pin.
XCIN/XCOUT
FSCIN
(3.58MHz)
or
(4.43MHz)
32kHz of
oscillation circuits
Generating circuit
system clock
Data slicer circuit
"1" Sub clock
f(XCIN)
"0" CC2 address 021116 bit 2
"1"
Main clock
f(XIN)
Inside system
clock of switch circuit
"0"
"1" Clock for OSD
f(OSC)
CM address 00FB16 bit 7(CM7)
"0" OC2 address 00D016 bit 3 or 4
f (Φ)
f(XIN) = 8.95 MHz f(OSC) = 26.85 MHz at 3.58 MHz oscillation frequency
f(XIN) = 8.86 MHz f(OSC) = 26.58 MHz at 4.43 MHz oscillation frequency
Fig. 7.2 clock generating circuit
Rev.1.00 Nov 01, 2002 page 11 of 139
REJ03B0128-0100Z
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M37150MF.PDF ] | |
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