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PDF IC62C1024AL Data sheet ( Hoja de datos )

Número de pieza IC62C1024AL
Descripción 128K x 8 Low Power CMOS SRAM
Fabricantes ICSI 
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IC62C1024AL
Document Title
128K x 8 Low Power CMOS SRAM
Revision History
Revision No
0A
History
Initial Draft
Draft Date
May 7,2002
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
ALSR009-0A 5/7/2002
1

1 page




IC62C1024AL pdf
IC62C1024AL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
-35
Min. Max.
-45
Min. Max.
-55
Min. Max.
-70
Min. Max.
Unit
tRC Read Cycle Time
35 —
45 —
55 —
70 —
ns
tAA Address Access Time
— 35
— 45
— 55
— 70
ns
tOHA Output Hold Time
tACE1 CE1 Access Time
3—
— 35
3—
— 45
3—
— 55
3—
— 70
ns
ns
tACE2 CE2 Access Time
tDOE OE Access Time
tLZOE(2) OE to Low-Z Output
tHZOE(2) OE to High-Z Output
tLZCE1(2) CE1 to Low-Z Output
— 35
— 10
0—
0 10
3—
— 45
— 20
0—
0 15
5—
— 55
— 25
0—
0 20
7—
— 70
— 35
0—
0 25
10 —
ns
ns
ns
ns
ns
tLZCE2(2) CE2 to Low-Z Output
tHZCE(2) CE1 or CE2 to High-Z Output
3—
0 10
5—
0 15
7—
0 20
10 —
0 25
ns
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
5 ns
1.5V
See Figures 1a and 1b
AC TEST LOADS
480
5V
OUTPUT
100 pF
Including
jig and
scope
Figure 1a.
255
Integrated Circuit Solution Inc.
ALSR009-0A 5/7/2002
480
5V
OUTPUT
5 pF
Including
jig and
scope
Figure 1b.
255
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