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PDF CBTU0808 Data sheet ( Hoja de datos )
| Número de pieza | CBTU0808 | |
| Descripción | Dual lane PCI Express port multiplexer | |
| Fabricantes | NXP Semiconductors | |
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CBTU0808
Dual lane PCI Express port multiplexer
Rev. 01 — 2 June 2006
Product data sheet
1. General description
The CBTU0808 is a dual lane port multiplexer designed to provide convenient and reliable
path switching for PCI Express signals. It is organized as two PCI Express lanes, each
consisting of a Transmit and Receive channel. Each channel has four ports, two (A and B)
on the source (or host) side and two (A and B) on the destination (or device) side. Each
port provides a pair of signal lines to support PCIe differential signaling.
Using specially designed high-bandwidth and high off-isolation switch elements, source
and destination ports can be connected or isolated in three possible configurations:
source A and B to destinations A and B respectively; or source A to destination B
(remaining ports isolated), or all ports isolated.
The switch elements are controlled by internal control logic to set switch positions in
accordance with these three configurations, selectable by CMOS inputs CTRL0 and
CTRL1 for lanes 0 and 1 respectively. Within a lane, the switch configuration is always
applied identically to both transmit and receive channels.
The CBTU0808 is packaged in a 48-ball, depopulated 9 × 9 grid, 0.5 mm ball pitch, thin
profile fine-pitch ball grid array (TFBGA) package, which (while requiring a minimum
5 mm × 5 mm of board space) allows for adequate signal routing and escape using
conventional board technology.
2. Features
I 2-lane wide PCI Express port multiplexer
I One transmit and one receive differential channel per lane
I Four ports per channel
I PCI Express signaling compliant
I High bandwidth: > 1 GHz
I Low OFF-feedthrough of < −35 dB at 1.25 GHz
I Low channel crosstalk of < −35 dB at 1.25 GHz
I Designed to match characteristic impedance of PCIe signaling environment
I Single 1.8 V supply operation
I ESD resilience of 2 kV HBM
I Available in 48-ball, 5 mm × 5 mm, 0.5 mm ball pitch TFBGA package, Pb-free/Green
3. Applications
I High-performance computing applications
I Port switching and docking applications
1 page  
Philips Semiconductors
CBTU0808
Dual lane PCI Express port multiplexer
7. Functional description
7.1 Functional description
7.1.1 General information
The CBTU0808 Dual lane PCI Express port multiplexer is designed to allow port switching
of up to two PCI Express lanes (each including a Transmit and Receive channel)
according to three switch configuration settings (described in Section 7.1.2.1). The basic
switch element of the CBTU0808 is designed integrally with its package and chip
interconnect to present an optimum characteristic on-impedance when used in a
PCI Express signaling environment, and to provide high off-port isolation and low
crosstalk.
7.1.2 Functional information
The following paragraphs describe the control and configuration possibilities available in
the CBTU0808.
7.1.2.1 Switch configuration
The position of the port switches is controlled by CMOS input signals CTRL[1:0] and can
be overridden by CMOS input TEST0 to disconnect (open) all ports between source and
destination. For a given lane, the switch positions are always identical between transmit
and receive channels. Lane 0 is controlled by CTRL0 and Lane 1 is controlled by CTRL1.
The truth table for the switch position as a function of these inputs is shown in Table 3.
Table 3. Switch configuration truth table
Inputs
Function
CTRLn[1] TEST0
Source ports[1] Destination ports
AB
LOW
LOW
HIGH[2] LOW
An
Bn
An
Bn
Ron
high-Z
high-Z
high-Z
high-Z
Ron
Ron
high-Z
LOW
HIGH
An
high-Z
high-Z
Bn
high-Z
high-Z
> LOW HIGH
Test mode for internal use only
[1] n is the Lane number (0 or 1).
[2] CTRL1 or CTRL0 = HIGH.
Comment
SA:DA/SB:DB
(Dual Through mode)
SA:DB
(Single Cross mode)
All ports open-circuit
(Disconnect mode)
do not use
CBTU0808_1
Product data sheet
Rev. 01 — 2 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
5 of 16
5 Page 
Philips Semiconductors
CBTU0808
Dual lane PCI Express port multiplexer
13. Package outline
TFBGA48: plastic thin fine-pitch ball grid array package; 48 balls; body 5 x 5 x 0.8 mm
SOT918-1
ball A1
index area
D
BA
A2
EA
A1
detail X
e1
eb
J
H
G
F
E
D
C
B
A
ball A1
index area
123456789
∅v M C A B
∅w M C
e2
e
y1 C
C
y
X
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
A2
b
D
E
e
e1 e2
v
w
y
y1
mm
1.15
0.25
0.15
0.90
0.75
0.35
0.25
5.1
4.9
5.1
4.9
0.5
4
4 0.15 0.05 0.08 0.1
OUTLINE
VERSION
SOT918-1
IEC
---
REFERENCES
JEDEC
JEITA
MO-195
---
EUROPEAN
PROJECTION
ISSUE DATE
05-09-21
05-10-13
Fig 10. Package outline SOT918-1 (TFBGA48)
CBTU0808_1
Product data sheet
Rev. 01 — 2 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CBTU0808.PDF ] | |
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