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Número de pieza | NCP1230 | |
Descripción | Low Standby Power High Performance PWM Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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NCP1230
Low−Standby Power High
Performance PWM
Controller
The NCP1230 represents a major leap towards achieving low
standby power in medium−to−high power Switched−Mode Power
Supplies such as notebook adapters, off−line battery chargers and
consumer electronics equipment. Housed in a compact 8−pin package
(SOIC−8, SOIC−7, or PDIP−7), the NCP1230 contains all needed
control functionality to build a rugged and efficient power supply. The
NCP1230 is a current mode controller with internal ramp
compensation. Among the unique features offered by the NCP1230 is
an event management scheme that can disable the front−end PFC
circuit during standby, thus reducing the no load power consumption.
The NCP1230 itself goes into cycle skipping at light loads while
limiting peak current (to 25% of nominal peak) so that no acoustic
noise is generated. The NCP1230 has a high−voltage startup circuit
that eliminates external components and reduces power consumption.
The NCP1230 also features an internal latching function that can be
used for OVP protection. This latch is triggered by pulling the CS pin
above 3.0 V and can only be reset by pulling VCC to ground. True
overload protection, internal 2.5 ms soft−start, internal leading edge
blanking, internal frequency dithering for low EMI are some of the
other important features offered by the NCP1230.
Features
• Current−Mode Operation with Internal Ramp Compensation
• Internal High−Voltage Startup Current Source for Loss−Less Startup
• Extremely Low No−Load Standby Power
• Skip−Cycle Capability at Low Peak Currents
• Direct Connection to PFC Controller for Improved No−Load Standby
Power
• Internal 2.5 ms Soft−Start
• Internal Leading Edge Blanking
• Latched Primary Overcurrent and Overvoltage Protection
• Short−Circuit Protection Independent of Auxiliary Level
• Internal Frequency Jittering for Improved EMI Signature
• +500 mA/−800 mA Peak Current Drive Capability
• Available in Three Frequency Options: 65 kHz, 100 kHz, and 133 kHz
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient and AC Analysis
• Pb−Free Packages are Available
Typical Applications
• High Power AC−DC Adapters for Notebooks, etc.
• Offline Battery Chargers
• Set−Top Boxes Power Supplies, TV, Monitors, etc.
http://onsemi.com
MARKING
DIAGRAM
8
SOIC−8 VHVIC
230Dy
8
D SUFFIX
CASE 751
ALYWy
G
11
8
1
SOIC−7
D1 SUFFIX
CASE 751U
8
30D16
ALYWG
G
1
8
1
PDIP−7 VHVIC
P SUFFIX
CASE 626B
1
1230Pxxx
AWL
YYWWG
xxx = Device Code: 65, 100, 133
y = Device Code: 6, 1, 1
y = Device Code: 5, 0, 3
A = Assembly Location
L = Wafer Lot
Y, YY = Year
W, WW = Work Week
G = Pb−Free Package
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
1
PFC Vcc
FB
CS
GND
8
HV
VCC
DRV
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 8
1
Publication Order Number:
NCP1230/D
1 page NCP1230
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C,
VCC = 13 V, VPIN8 = 30 V unless otherwise noted.)
Characteristic
Symbol Pin Min Typ Max Unit
Supply Section (All frequency versions, otherwise noted)
Turn−On Threshold Level, VCC Going Up (Vfb = 2.0 V)
Minimum Operating Voltage after Turn−On
VCC Decreasing Level at which the Latch−Off Phase Ends (Vfb = 3.5 V)
VCC Level at which the Internal Logic gets Reset
Internal IC Consumption, No Output Load on Pin 6 (Vfb = 2.5 V)
Internal IC Consumption, 1.0 nF Output Load on Pin 6, FSW = 65 kHz
(Vfb = 2.5 V)
Internal IC Consumption, 1.0 nF Output Load on Pin 6, FSW = 100 kHz
Internal IC Consumption, 1.0 nF Output Load on Pin 6, FSW = 133 kHz
Internal IC Consumption, Latch−Off Phase
Internal Startup Current Source
VCCOFF
VCC(min)
VCClatch
VCCreset
ICC1
ICC2
ICC2
ICC2
ICC3
6
11.6 12.6 13.6
V
6
7.0 7.7 8.4
V
6
5.0 5.6 6.2
V
6
− 4.0 −
V
6 0.6 1.1 1.8 mA
6 1.3 1.8 2.5 mA
6 1.3 2.2 3.0 mA
6 1.3 2.8 3.3 mA
6 400 680 1000 mA
High−Voltage Current Source, 1.0 nF Load
(VCCOFF −0.2 V, Vfb = 2.5 V, VPIN8 = 30 V)
High−Voltage Current Source (VCC = 0 V)
Minimum Startup Voltage (Ic = 0.5 mA, VCCOFF −0.2 V, Vfb = 2.5 V)
Startup Leakage (VPIN8 = 500 V)
Drive Output
IC1
IC2
VHVmin
IHVLeak
8 1.8 3.2 4.2 mA
8 1.8 4.4 5.6 mA
8
−
20 23
V
8 10 30 80 mA
Output Voltage Rise−Time @ CL = 1.0 nF, 10−90% of Output Signal
Output Voltage Fall−Time @ CL = 1.0 nF, 10−90% of Output Signal
Source Resistance, RLoad 300 W (Vfb = 2.5 V)
Sink Resistance, at 1.0 V on Pin 5 (Vfb = 3.5 V)
Pin 1 Output Impedance (or Rdson between Pin 1 and Pin 6 when SW1
is closed) Rload on Pin 1 = 680 W
Current Comparator and Thermal Shutdown
Tr
Tf
ROH
ROL
RPFC
5 − 40 − ns
5 − 15 − ns
5
6.0 12.3 25
W
5
3.0 7.5 18
W
1
6.0 11.7 23
W
Input Bias Current @ 1.0 V Input Level on Pin 3
Maximum Internal Current Setpoint
Tj = 25°C
Tj = −40°C to +125°C
IIB
ILimit
3 − 0.02 − mA
3
1.010 1.063 1.116
V
0.979
− 1.127
Default Internal Setpoint for Skip Cycle Operation and Standby
Detection
Vskip
3 600 750 900 mV
Default Internal Setpoint to Leave Standby
Vstby−out
−
1.0 1.25 1.5
V
Propagation Delay from CS Detected to Gate Turned Off (VGate = 10 V)
(Pin 5 Loaded by 1.0 nF)
TDEL CS
3
− 90 180 ns
Leading Edge Blanking Duration
Soft−Start Period (Note 3)
TLEB
SS
3 100 200 350 ns
− − 2.5 − ms
Temperature Shutdown, Maximum Value (Note 3)
Hysteresis while in Temperature Shutdown (Note 3)
3. Verified by Design.
TSD
TSD hyste
−
−
150 165
− 25
−
−
°C
°C
http://onsemi.com
5
5 Page NCP1230
OPERATING DESCRIPTION
Introduction
The NCP1230 is a current mode controller which provides
a high level of integration by providing all the required
control logic, protection, and a PWM Drive Output into a
single chip which is ideal for low cost, medium to high
power off−line application, such as notebook adapters,
battery chargers, set−boxes, TV, and computer monitors.
The NCP1230 can be connected directly to a high voltage
source providing lossless startup, and eliminating external
startup circuitry. In addition, the NCP1230 has a PFC_VCC
output pin which provides the bias supply power for a Power
Factor Correction controller, or other logic. The NCP1230
has an event management scheme which disables the
PFC_VCC output during standby, and overload conditions.
PFC_VCC
As shown on the internal NCP1230 diagram, an internal
low impedance switch SW1 routes Pin 6 (VCC) to Pin 1
when the power supply is operating under nominal load
conditions. The PFC_VCC signal is capable of delivering up
to 35 mA of continuous current for a PFC Controller, or
other logic.
Connecting the NCP1230 PFC_VCC output to a PFC
Controller chip is very straight forward, refer to the “Typical
Application Example” all that is generally required is a
small decoupling capacitor (0.1 mF).
High Voltage
18
27
36
45
MC33262/33260
PFC_VCC
1
8
27
36
45
NCP1230
+ Vout
GND
VCC Cap
Figure 29. Typical Application Example
Rsense
GND
http://onsemi.com
11
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet NCP1230.PDF ] |
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