|
|
PDF AD5678 Data sheet ( Hoja de datos )
| Número de pieza | AD5678 | |
| Descripción | 4 x 12-Bit and 4 x 16-Bit Octal DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD5678 (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
4 × 12-Bit and 4 × 16-Bit Octal DAC with
On-Chip Reference in 14-Lead TSSOP
AD5678
FEATURES
Low power octal DAC with
Four 16-bit DACs
Four 12-bit DACs
14-lead/16-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA @ 5 V, 200 nA @ 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale
3 power-down functions
Hardware LDAC and LDAC override function
CLR function to programmable code
Rail-to-rail operation
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5678 is a low power, octal, buffered voltage-output
DAC with four 12-bit DACs and four 16-bit DACs in a single
package. All devices operate from a single 2.7 V to 5.5 V supply
and are guaranteed monotonic by design.
The AD5678 has an on-chip reference with an internal gain of 2.
The AD5678-1 has a 1.25 V 5 ppm/°C reference, giving a full-
scale output of 2.5 V; the AD5678-2 has a 2.5 V 5 ppm/°C
reference, giving a full-scale output of 5 V. The on-board
reference is off at power-up, allowing the use of an external
reference. The internal reference is enabled via a software write.
The part incorporates a power-on reset circuit that ensures that
the DAC output powers up to 0 V and remains powered up at
this level until a valid write takes place. The part contains a
power-down feature that reduces the current consumption of
the device to 400 nA at 5 V and provides software-selectable
output loads while in power-down mode for any or all DAC
channels.
FUNCTIONAL BLOCK DIAGRAM
AD5678
LDAC
SCLK
SYNC
DIN
INTERFACE
LOGIC
LDAC1 CLR1
1RU-16 PACKAGE ONLY
VDD
VREFIN/VREFOUT
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
POWER-ON
RESET
DAC
REGISTER
1.25V/2.5V
REF
STRING
DAC A
BUFFER
STRING
DAC B
BUFFER
STRING
DAC C
BUFFER
STRING
DAC D
BUFFER
STRING
DAC E
BUFFER
STRING
DAC F
BUFFER
STRING
DAC G
BUFFER
STRING
DAC H
BUFFER
POWER-DOWN
LOGIC
GND
Figure 1.
VOUTA
VOUTB
VOUTC
VOUTD
VOUTE
VOUTF
VOUTG
VOUTH
The outputs of all DACs can be updated simultaneously using
the LDAC function, with the added functionality of user-
selectable DAC channels to simultaneously update. There is
also an asynchronous CLR that clears all DACs to a software-
selectable code—0 V, midscale, or full scale.
The AD5678 utilizes a versatile 3-wire serial interface that
operates at clock rates of up to 50 MHz and is compatible with
standard SPI®, QSPI™, MICROWIRE™, and DSP interface
standards. The on-chip precision output amplifier enables rail-
to-rail output swing.
PRODUCT HIGHLIGHTS
1. Octal DAC (four 12-bit DACs and four 16-bit DACs).
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 14-lead/16-lead TSSOP.
4. Power-on reset to 0 V.
5. Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD5678
VDD = 2.7 V to 3.6 V, RL = 2 kΩ to GND, CL = 200 pF to GND, VREFIN = VDD. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE2
AD5678 (DAC C, D, E, F)
Resolution
Relative Accuracy
Differential Nonlinearity
AD5678 (DAC A, B, G, H)
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Code Error
Zero-Code Error Drift
Full-Scale Error
Gain Error
Gain Temperature Coefficient
Offset Error
Offset Temperature Coefficient
DC Power Supply Rejection
Ratio
DC Crosstalk
(External Reference)
DC Crosstalk
(Internal Reference)
OUTPUT CHARACTERISTICS3
Output Voltage Range
Capacitive Load Stability
DC Output Impedance
Short-Circuit Current
Power-Up Time
REFERENCE INPUTS
Reference Input Voltage
Reference Current
Reference Input Range
Reference Input Impedance
REFERENCE OUTPUT
Output Voltage
AD5678-1
Reference TC3
Reference Output Impedance
A Grade1
Min Typ Max
12
±0.5 ±2
±1
16
±32
±1
19
±2
−0.2 −1
±1
±2.5
±1 ±9
1.7
–80
10
4.5
10
25
4.5
0 VDD
2
10
0.5
30
4
VDD
20 20
0 VDD
14.6
1.247
±5
7.5
1.253
±15
B Grade1
Min Typ Max
12
±0.5 ±1
±1
16
±16
±1
19
±2
−0.2 −1
±1
±2.5
±1 ±9
1.7
–80
10
4.5
10
25
4.5
0 VDD
2
10
0.5
30
4
VDD
20 20
0 VDD
14.6
1.247
±5
7.5
1.253
±15
Unit
Bits
LSB
LSB
Bits
LSB
LSB
mV
μV/°C
% FSR
% FSR
ppm
mV
μV/°C
dB
μV
μV/mA
μV
μV
μV/mA
V
nF
nF
Ω
mA
μs
V
μA
V
kΩ
V
ppm/°C
kΩ
Conditions/Comments
See Figure 11
Guaranteed monotonic by design
(see Figure 12)
See Figure 5
Guaranteed monotonic by design (See Figure 6)
All 0s loaded to DAC register (See Figure 17)
All 1s loaded to DAC register (See Figure 18)
Of FSR/°C
VDD ± 10%
Due to full-scale output change,
RL = 2 kΩ to GND or VDD
Due to load current change
Due to powering down (per channel)
Due to full-scale output change,
RL = 2 kΩ to GND or VDD
Due to load current change
RL = ∞
RL = 2 kΩ
VDD = 3 V
Coming out of power-down mode; VDD = 3 V
±1% for specified performance
VREF = VDD = 3.6 V (per DAC channel)
Per DAC channel
At ambient
Rev. A | Page 5 of 28
5 Page 
TYPICAL PERFORMANCE CHARACTERISTICS
10
VDD = VREF = 5V
8 TA = 25°C
6
4
2
0
–2
–4
–6
–8
–10
0
5k 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k
CODE
Figure 5. INL—16-Bit DAC
1.0
VDD = VREF = 5V
0.8 TA = 25°C
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
10k 20k
30k 40k
CODE
50k
Figure 6. DNL—16-Bit DAC
60k
AD5678
1.0
VDD = 5V
0.8 VREFOUT = 2.5V
TA = 25°C
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
CODE
Figure 8. DNL 16-Bit DAC, 2.5 V Internal Reference
10
VDD = 3V
8 VREFOUT = 1.25V
TA = 25°C
6
4
2
0
–2
–4
–6
–8
–10
CODE
Figure 9. INL—16-Bit DAC, 1.25 V Internal Reference
10
VDD = 5V
8 VREFOUT = 2.5V
TA = 25°C
6
4
2
0
–2
–4
–6
–8
–10
CODE
Figure 7. INL—16-Bit DAC, 2.5 V Internal Reference
Rev. A | Page 11 of 28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet AD5678.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD567 | CORRECTION TO CASE OUTLINE DIMENSION |  ETC |
| AD567 | Microprocessor Compatible 12-Bit D/A Converter | Analog Devices |
| AD5671R | 12-/16-Bit nanoDAC+ | Analog Devices |
| AD5672R | 12-/16-Bit nanoDAC+ | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |