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PDF ADP1821 Data sheet ( Hoja de datos )
| Número de pieza | ADP1821 | |
| Descripción | Step-Down DC-to-DC Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Wide power-input voltage range: 1 V to 24 V
Chip supply voltage range: 3 V to 5.5 V
Wide output voltage range: 0.6 V to 85% of input voltage
1% accuracy, 0.6 V reference voltage
All N-channel MOSFET design for low cost
Fixed-frequency operation 300 kHz, 600 kHz, or
synchronized operation up to 1.2 MHz
No current sense resistor required
Power-good output
Programmable soft start with reverse current protection
Soft start, thermal overload, current-limit protection
Undervoltage lockout
10 μA shutdown supply current
Small, 16-lead QSOP
APPLICATIONS
Telecom and networking systems
Set-top boxes
Printers
Servers
Medical imaging systems
Microprocessor and DSP core power supplies
Mobile communication base stations
BIAS INPUT
5V
1µF
10Ω
100kΩ
1.5nF
1µF
4.7kΩ
VCC PVCC
ADP1821
SHDN
FREQ
SYNC
PWGD
BST
DH
SW
CSL
COMP
DL
PGND
SS GND FB
D1
0.47µF
3.3kΩ
POWER INPUT
2.5V TO 20V
+ CIN1 + CIN2
2.2µF 2.2µF
25V 25V
×2
M1
L1 = 1µH
M2 M3
COUT1
10µF
+
6.3V
×2
COUT2
820µF
2.5V
×2
OUTPUT
1.8V, 20A
300Ω
10nF
2kΩ
6.8nF 100nF
AGND
1kΩ
fSW = 300kHz
CIN2: SANYO, OSCON 20SP180M
COUT2: SANYO, OSCON 2R5SEPC820M
L1: COILTRONICS, HC7-1R0
CIN1: MURATA, GRM31MR71E225k
M1: IRLR7807Z
M2, M3: IRFR3709Z
D1: VISHAY BAT54
Figure 1. Typical Operating Circuit
Step-Down DC-to-DC Controller
ADP1821
GENERAL DESCRIPTION
The ADP1821 is a versatile and inexpensive, synchronous, pulse
width-modulated (PWM), voltage-mode, step-down controller.
It drives an all N-channel power stage to regulate an output voltage
as low as 0.6 V. The ADP1821 can be configured to provide
output voltages from 0.6 V to 85% of the input voltage and is
sized to handle large MOSFETs for point-of-load regulators.
The ADP1821 is well suited for a wide range of high power
applications, such as DSP and processor core power in telecom,
medical imaging, high performance servers, and industrial
applications. It operates from a 3.0 V to 5.5 V supply with a
power input voltage ranging from 1.0 V to 24 V.
The ADP1821 operates at a pin-selectable, fixed switching
frequency of either 300 kHz or 600 kHz, minimizing external
component size and cost. For noise-sensitive applications, it
can be synchronized to an external clock to achieve switching
frequencies between 300 kHz and 1.2 MHz. The ADP1821
includes soft start protection to limit the inrush current from
the input supply during startup, reverse current protection
during soft start for precharged outputs, as well as a unique
adjustable lossless current-limit scheme utilizing external
MOSFET sensing.
The ADP1821 operates over the –40°C to +85°C temperature
range and is available in a 16-lead QSOP.
97
TA = 25°C
96 FREQUENCY = 300kHz
3.3V OUTPUT
95
94
93
92 1.8V OUTPUT
91
90
89
88
87
0 2 4 6 8 10 12 14
LOAD CURRENT (A)
Figure 2. Efficiency vs. Load Current, 5 V Input
16
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VCC, SHDN, SYNC, FREQ, COMP, SS, FB to
GND, PVCC to PGND, BST to SW
BST to GND
CSL to GND
DH to GND
DL to PGND
SW to GND
PGND to GND
θJA, 2-Layer (SEMI Standard Board)
θJA, 4-Layer (JEDEC Standard Board)
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
Maximum Soldering Lead Temperature
Rating
−0.3 V to +6 V
−0.3 V to +30 V
−1 V to +30 V
(VSW − 0.3 V) to
(VBST + 0.3 V)
−0.3 V to
(VPVCC + 0.3 V)
−2 V to +30 V
±2 V
150°C/W
105°C/W
−40°C to +85°C
−55°C to +125°C
−65°C to +150°C
260°C
ADP1821
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all other voltages
are referenced to GND.
ESD CAUTION
SIMPLIFIED BLOCK DIAGRAM
SHDN
VCC
UVLO
GND
FREQ
SYNC
COMP
THERMAL
SHUTDOWN
OSCILLATOR
LOGIC
FAULT
SQ
PWM
RQ
VCC
ADP1821
BST
DH
SW
PVCC
DL
PGND
CSL
FB
100kΩ
SS
2.5kΩ
0.6V
0.8V
REFERENCE
OV
UV
FAULT
UVLO
THSD
Figure 3. Simplified Block Diagram
PWGD
Rev. B | Page 5 of 24
5 Page 
When an external clock is detected at the first SYNC edge,
the internal oscillator is reset and clock control shifts to SYNC.
The SYNC edges then trigger subsequent clocking of the PWM
outputs. The DH rising edges appear about 320 ns after the cor-
responding SYNC edge, and the frequency is locked to the
external signal. If the external SYNC signal disappears during
operation, the ADP1821 reverts to its internal oscillator and
experiences a delay of no more than a single cycle of the
internal oscillator.
COMPENSATION
The control loop is compensated by an external series RC
network from COMP to FB and sometimes requires a series
RC in parallel with the top voltage divider resistor. COMP is
the output of the internal error amplifier.
The internal error amplifier compares the voltage at FB to the
internal 0.6 V reference voltage. The difference between the two
(the feedback voltage error) is amplified by the error amplifier.
To optimize the ADP1821 for stability and transient response
for a given set of external components and input/output voltage
conditions, choose the compensation components carefully. For
more information on choosing the compensation components,
see the Compensating the Voltage Mode Buck Regulator
section.
ADP1821
POWER-GOOD INDICATOR
The ADP1821 features an open-drain, power-good output
(PWGD) that sinks current when the output voltage drops 8.3%
below or 25% above the nominal regulation voltage. Two com-
parators measure the voltage at FB to set these thresholds. The
PWGD comparator directly monitors FB, and the threshold is
fixed at 0.55 V for undervoltage and 0.75 V for overvoltage. The
PWGD output also sinks current if an over temperature or input
undervoltage condition is detected and is operational with VCC
voltage as low as 1.0 V.
Use this output as a logical power-good signal by connecting a
pull-up resistor from PWGD to an appropriate supply voltage.
THERMAL SHUTDOWN
The ADP1821 controller does not generate much heat under
normal conditions, even when driving a relatively large MOSFET.
However, the surrounding power components or other circuits
on the same PCB could heat up the PCB to an unsafe operating
temperature. The ADP1821 controller goes into shutdown and
shuts off the gate drivers when its junction temperature reaches
about 145°C. When the junction temperature drops below
about 135°C, the ADP1821 resumes normal operation in a soft
start mode.
SHUTDOWN CONTROL
The ADP1821 dc-to-dc converter features a low-power shut-
down mode that reduces quiescent supply current to 1 μA. To
shut down the ADP1821, drive SHDN low. To turn it on, drive
SHDN high. For automatic startup, connect SHDN to VCC.
Rev. B | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADP1821.PDF ] | |
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