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NCN4555
1.8V / 3V SIM Card Power
Supply and Level Shifter
The NCN4555 is a level shifter analog circuit designed to translate
the voltages between a SIM Card and an external microcontroller or
MPU. A built−in LDO−type DC−DC converter makes the NCN4555
useable to drive 1.8 V and 3.0 V SIM card. The device fulfills the
ISO7816−3 smart card interface standard as well as GSM 11.11 and
related (11.12 and 11.18) and 3G mobile requirements (IMT−2000/3G
TS 31.101). With the STOP pin a low current shutdown mode can be
activated making the battery life longer. The Card power supply
voltage (SIM_VCC) is selected using a single pin (MOD_VCC).
Features
• Supports 1.8 V or 3.0 V Operating SIM Card
• The LDO is able to Supply More than 50 mA under 1.8 V and 3.0 V
• Built−in Pullup Resistor for I/O Pin in Both Directions
• All Pins are Fully ESD Protected According to ISO−7816
Specifications – ESD Protection on SIM Pins in Excess of 7 kV
(Human Body Model)
• Supports up to More than 5 MHz Clock
• Low−Profile 3x3 QFN−16 Package
• Pb−Free Packages are Available*
Typical Applications
• SIM Card Interface Circuit for 2G, 2.5G and 3G Mobile Phones
• Identification Module
• Smart Card Readers
• Wireless PC Cards
1.8 V to 5.5 V 2.7 V to 5.5 V
0.1mF 0.1mF
http://onsemi.com
QFN−16
MN SUFFIX
1 CASE 488AK
MARKING DIAGRAM
ÇÇÇÇÇÇ16
1
NCN
4555
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
VBB
P3
P2
P1
P0
SIM Card
Detect
GND
GND
5
3 VDD
1 STOP
2 MOD_VCC
14 RST
SIM_VCC 7
SIM_RST 9
1
2
3
4
13 CLK
11
SIM_CLK
15 I/O
SIM_I/O 8
1mF
GND
10
VCC GND
RST
CLK I/O
C4 C8
DET DET
GND
5
6
7
8
Figure 1. Typical Interface Application
ORDERING INFORMATION
Device
Package
Shipping†
NCN4555MN
QFN−16 123 Units / Rail
NCN4555MNG
QFN−16 123 Units / Rail
(Pb−Free)
NCN4555MNR2 QFN−16 3000/Tape & Reel
NCN4555MNR2G QFN−16 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 1
1
Publication Order Number:
NCN4555/D
NCN4555
POWER SUPPLY SECTION (−25°C to +85°C)
Pin Symbol
Rating
Min Typ Max Unit
5
VBAT
Power Supply
5
I VBAT
Operating current – ICC = 0 mA (Note 6)
5 I VBAT_SD Shutdown current – STOP= Low (Note 7)
3 VDD Operating Voltage
3
IVDD
Operating Current – fCLK = 1 MHz (Note 8)
3 IVDD_SD Shutdown Current – STOP = Low
3 VDD Undervoltage Lockout
7 SIM_VCC MOD_VCC = High, VBAT = 3.0 V, ISIM_VCC = 50 mA
MOD_VCC = High, VBAT = 3.3 V to 5.5 V, ISIM_VCC = 0 mA to 50 mA
MOD_VCC = Low, VBAT = 2.7 V to 5.5 V, ISIM_VCC = 0 mA to 50 mA
7 ISIM_VCC_SC Short –Circuit Current – SIM_VCC shorted to ground , TA=25°C
2.7 5.5 V
22 30 mA
3.0 mA
1.8 5.5 V
7.0 12 mA
1.0 mA
0.6 1.5 V
2.8 V
2.8 3.0 3.2 V
1.7 1.8 1.9 V
175 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. As long as VBAT – VDD v 2.5 V. For VBAT – VDD > 2.5 V the maximum value increases up to 35 mA (typical being in the +25 mA range).
7. As long as VBAT – VDD v 2.5 V.
8. Guaranteed by design over the operating temperature range specified.
DIGITAL INPUT/OUTPUT SECTION CLOCK, RESET, I/O, STOP, MOD_VCC
Pin Symbol
Rating
Min Typ Max Unit
1,2, 13,
14, 15
13, 14
Vin
IIH & IIL
VIH
VIL
Input Voltage Range (STOP, MOD_VCC, RST, CLK, I/O)
Input Current (STOP, MOD_VCC, RST, CLK)
High Level Input Voltage (RST, CLK)
Low Level Input Voltage (RST, CLK)
0
−100
0.7 * VDD
VDD
100
VDD
0.2 * VDD
V
nA
V
V
1, 2 VIH High Level Input Voltage (STOP, MOD_VCC)
VIL Low Level Input Voltage (STOP, MOD_VCC)
0.7 * VDD
0
VDD
V
0.4 V
15 VOH_I/O High Level Output Voltage (SIM_I/O = SIM_VCC, IOH_I/O = −20 mA)
VOL_I/O Low Level Output Voltage (SIM_I/O = 0 V, IOH_I/O = 200 mA)
IIH High Level Input Current (I/O)
IIL Low Level Input Current (I/O)
15 Rpu_I/O I/0 Pullup Resistor
0.7 * VDD
0
−20
12
18
VDD
V
0.4 V
20 mA
1.0 mA
24 kW
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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