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PDF NB6L14M Data sheet ( Hoja de datos )
| Número de pieza | NB6L14M | |
| Descripción | Differential 1:4 CML Fanout Buffer | |
| Fabricantes | ON Semiconductor | |
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NB6L14M
2.5 V/3.3 V 3.0 GHz
Differential 1:4 CML Fanout
Buffer
Multi−Level Inputs with Internal Termination
Description
The NB6L14M is a 3.0 GHz differential 1:4 CML fanout buffer.
The differential inputs incorporate internal 50 W termination resistors
that are accessed through the VT pin. This feature allows the
NB6L14M to accept various logic standards, such as CML, LVCMOS,
LVTTL, CML, or LVDS logic levels. The 16 mA differential CML
outputs provide matching internal 50 W terminations and produce
400 mV output swings when externally terminated with a 50 W
resistor to VCC. The VREFAC reference output can be used to rebias
capacitor−coupled differential or single−ended input signals. The 1:4
fanout design was optimized for low output skew applications.
The NB6L14M is a member of the ECLinPS MAX™ family of high
performance clock and data products.
Features
• Maximum Input Clock Frequency > 3.0 GHz, Typical
• < 20 ps Within Device Output Skew
• 350 ps Typical Propagation Delay
• 90 ps Typical Rise and Fall Times
• Differential CML Outputs, 400 mV Amplitude, Typical
• CML Mode Operating Range: VCC = 2.375 V to 3.63 V with
GND = 0 V
• Internal Input and Output Termination Resistors, 50 W
• VREFAC Reference Output Voltage
• −40°C to +85°C Ambient Operating Temperature
• Available in 3 mm x 3 mm 16 Pin QFN
• These are Pb−Free Devices
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QFN−16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB6L
14M
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
DQ
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 0
1
Publication Order Number:
NB6L14M/D
1 page  
NB6L14M
Table 6. AC CHARACTERISTICS VCC = 2.375 V to 3.63 V, GND = 0 V, TA = −40°C to +85°C (Note 9)
Symbol
Characteristic
Min Typ
VOUTPP
tPD
tS
tH
tSKEW
Output Voltage Amplitude (@ VINPPmin) (Note 10)
fin ≤ 2.5 GHz
2.5 GHz ≤ fin ≤ 3.0 GHz
Propagation Delay
IN to Q
Set−Up Time (Note 11)
EN to IN, IN
Hold Time (Note 11)
EN to IN, IN
Within−Device Skew (Note 12)
Device−to−Device Skew (Note 13)
180
100
230
300
300
280
200
350
5.0
tDC Output Clock Duty Cycle
(Referenced Duty Cycle = 50%)
fin ≤ 3.0 GHz
40
50
tJITTER
VINPP
RMS Random Jitter (Note 14)
Peak−to−Peak Data Dependent Jitter
(Note 15)
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 10)
fIN ≤ 3.0 GHz
fIN ≤ 3.0 GHz
100
0.2
20
tr,tf Output Rise/Fall Times
(20%−80%)
70 90
Max
480
20
80
60
0.5
2800
150
Unit
mV
ps
ps
ps
ps
%
ps
mV
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. Measured by forcing VINPP (minimum) from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC. Input edge rates
40 ps (20%−80%).
10. Input and output voltage swing is a single−ended measurement operating in differential mode.
11. Set−up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous
applications, set−up and hold times do not apply.
12. Within device skew is measured between two different outputs under identical power supply, temperature and input conditions.
13. Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
14. Additive RMS jitter with 50% duty cycle clock signal.
15. Additive peak−to−peak data dependent jitter with input NRZ data at PRBS 23−1 and K28.5 at 2.5 Gb/s.
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5
5 Page 
NB6L14M
ECLinPS MAX is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
11
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NB6L14M/D
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