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PDF ADG2128 Data sheet ( Hoja de datos )
| Número de pieza | ADG2128 | |
| Descripción | IC CMOS 8 x 12 Unbuffered Analog Switch Array | |
| Fabricantes | Analog Devices | |
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Data Sheet
I2C® CMOS 8 × 12 Unbuffered Analog
Switch Array With Dual/Single Supplies
ADG2128
FEATURES
I2C-compatible interface
3.4 MHz high speed I2C option
32-lead LFCSP_VQ (5 mm × 5 mm)
Double-buffered input logic
Simultaneous update of multiple switches
Up to 300 MHz bandwidth
Fully specified at dual ±5 V/single +12 V operation
On resistance 35 Ω maximum
Low quiescent current < 20 µA
Qualified for automotive applications
APPLICATIONS
AV switching in TV
Automotive infotainment
AV receivers
CCTV
Ultrasound applications
KVM switching
Telecom applications
Test equipment/instrumentation
PBX systems
GENERAL DESCRIPTION
The ADG2128 is an analog cross point switch with an
array size of 8 × 12. The switch array is arranged so that
there are eight columns by 12 rows, for a total of 96 switch
channels. The array is bidirectional, and the rows and columns
can be configured as either inputs or outputs. Each of the 96
switches can be addressed and configured through the I2C-
compatible interface. Standard, full speed, and high speed
(3.4 MHz) I2C interfaces are supported. Any simultaneous
switch combination is allowed. An additional feature of the
ADG2128 is that switches can be updated simultaneously,
using the LDSW command. In addition, a RESET option
allows all of the switch channels to be reset/off. At power-on,
all switches are in the off condition. The device is packaged
in a 32-lead, 5 mm × 5 mm LFCSP_VQ.
ADG2128
FUNCTIONAL BLOCK DIAGRAM
VDD VSS
VL
SCL
SDA
INPUT
REGISTER
AND
7 TO 96
DECODER
1
96
1
LATCHES
96
LDSW
LDSW
8 × 12 SWITCH ARRAY
A2 A1 A0
GND
Figure 1.
Y0 TO Y7 (I/O)
X0 TO X11 (I/O)
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ADG2128
VDD = +5 V ± 10%, VSS = −5 V ± 10%, VL = 5 V, GND = 0 V, all specifications TMIN to TMAX, unless otherwise noted.1
Table 2.
B Version
Y Version
Parameter
−40°C to
−40°C to
+25°C +125°C +25°C +125°C Unit
Conditions
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
34
40 45
VDD − 2 V V max
34
Ω typ
VDD = +4.5 V, VSS = −4.5 V, VIN = VSS, IS = −10 mA
40 50
Ω max
50
55 65
50
55 70
Ω typ
Ω max
VDD = +4.5 V, VSS = −4.5 V, VIN = 0 V, IS = −10 mA
66
75 85
66
75 95
Ω typ
Ω max
VDD = +4.5 V, VSS = −4.5 V, VIN = +1.4 V, IS = −10 mA
On Resistance Matching
Between Channels, ∆RON
On Resistance Flatness, RFLAT(ON)
4.5
8
17
20
9
23
4.5
8 10
17
20 25
Ω typ
Ω max
Ω typ
Ω max
VDD = +4.5 V, VSS = −4.5 V, VIN = VSS, IS = −10 mA
VDD = +4.5 V, VSS = −4.5 V, VIN = VSS to 0 V, IS = −10 mA
34
42 45
34
42 48
Ω typ
Ω max
VDD = +4.5V,VSS = −4.5V, VIN = VSS to +1.4V, IS = −10 mA
LEAKAGE CURRENTS
Channel Off Leakage, IOFF
Channel On Leakage, ION
DYNAMIC CHARACTERISTICS2
±0.03
±0.03
±0.03
±0.03
µA typ
µA typ
VDD = 5.5 V, VSS = 5.5 V
VX = +4.5 V/−2 V, VY = −2 V/+4.5 V
VX = VY = −2 V or +4.5 V
COFF 6 6 pF typ
CON 9.5 9.5 pF typ
tON
170
170
ns typ
RL = 300 Ω, CL = 35 pF
200 215
200 220
ns max
tOFF
210
210
ns typ
RL = 300 Ω, CL = 35 pF
250 255
250 260
ns max
THD + N
PSRR
0.04
0.04
% typ
RL = 10 kΩ, f = 20 Hz to 20 kHz, VS = 1 V p-p
90 dB typ f = 20 kHz; without decoupling; see Figure 24
−3 dB Bandwidth
300
300
MHz typ Individual inputs to outputs
18 18 MHz typ 8 inputs to 1 output
Off Isolation
Channel-to-Channel Crosstalk
Adjacent Channels
−66
−62
−64 dB typ RL = 75 Ω, CL = 5 pF, f = 5 MHz
RL = 75 Ω, CL = 5 pF, f = 5 MHz
−62 dB typ
Nonadjacent Channels
−79
−79 dB typ
Differential Gain
1.5
1.5
% typ
RL = 75 Ω, CL = 5 pF, f = 5 MHz
Differential Phase
1.8
1.8
° typ
RL = 75 Ω, CL = 5 pF, f = 5 MHz
Charge Injection
−3
−3
pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF
LOGIC INPUTS (Ax, RESET)2
Input High Voltage, VINH
Input Low Voltage, VINL
Input Leakage Current, IIN
0.005
2.0
0.8
±1
0.005
2.0
0.8
±1
V min
V max
µA typ
µA max
Input Capacitance, CIN
7
7
pF typ
LOGIC INPUTS (SCL, SDA)2
Input High Voltage, VINH
Input Low Voltage, VINL
0.7 VL
VL + 0.3
−0.3
0.3 VL
0.7 VL
VL + 0.3
−0.3
0.3 VL
V min
V max
V min
V max
Rev. D | Page 5 of 28
5 Page 
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
200
TA = 25°C
180 IDS = 10mA
160
140 VSS = 0V
VDD = +8V
120 VSS = –5V
VDD = +5V
100
80
60
40
VSS = 0V
VDD = +12V
20
0
–5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 10 11 12
SOURCE VOLTAGE (V)
Figure 4. Signal Range
85
TA = 25°C
IDS = 10mA
75
65
55
VDD/VSS = ±4.5V
VDD/VSS = ±5V
45
VDD/VSS = ±5.5V
35
25
–5.5
–4.5
–3.5 –2.5 –1.5 –0.5
SOURCE VOLTAGE (V)
0.5
1.5
Figure 5. RON vs. Source Voltage, Dual ±5 V Supplies
70
TA = 25°C
65 IDS = 10mA
60
VDD = 10.8V
55
VDD = 12V
50
45
40
35
VDD = 13.2V
30
25
20
01234567
SOURCE VOLTAGE (V)
8
Figure 6. RON vs. Supplies, VDD = 12 V ± 10%
ADG2128
90
TA = 25°C
IDS = 10mA
80
70
60
VDD = 7.2V
VDD = 8V
50
VDD = 8.8V
40
30
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
SOURCE VOLTAGE (V)
Figure 7. RON vs. Source Voltage, VDD = 8 V ± 10%
80
VDD = +5V
70
VSS = –5V
IDS = 10mA
60
50
TA = +125°C
TA = +85°C
40
TA = +25°C
30
TA = –40°C
20
10
0
–5 –4 –3 –2 –1
0
SOURCE VOLTAGE (V)
1
Figure 8. RON vs. Temperature, Dual ±5 V Supplies
60
VDD = 12V
VSS = 0V
50 IDS = 10mA
TA = +125°C
TA = +85°C
40
30 TA = +25°C
TA = –40°C
20
10
0
012345
SOURCE VOLTAGE (V)
Figure 9. RON vs. Temperature, VDD = 12 V
6
Rev. D | Page 11 of 28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet ADG2128.PDF ] | |
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