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PDF ADL5317 Data sheet ( Hoja de datos )
| Número de pieza | ADL5317 | |
| Descripción | Avalanche Photodiode Bias Controller and Wide Range | |
| Fabricantes | Analog Devices | |
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Avalanche Photodiode Bias Controller and
Wide Range (5 nA to 5 mA) Current Monitor
ADL5317
FEATURES
Accurately sets avalanche photodiode (APD) bias voltage
Wide bias range from 6 V to 75 V
3 V-compatible control interface
Monitors photodiode current (5:1 ratio) over six decades
Linearity 0.25% from 10 nA to 1 mA, 0.5% from 5 nA to 5 mA
Overcurrent protection and overtemperature shutdown
Miniature 16-lead chip scale package (LFCSP 3 mm × 3 mm)
APPLICATIONS
Optical power monitoring and biasing in APD systems
Wide dynamic range voltage sourcing and current
monitoring in high voltage systems
GENERAL DESCRIPTION
The ADL5317 is a high voltage, wide dynamic range, biasing
and current monitoring device optimized for use with
avalanche photodiodes. When used with a stable high voltage
supply (up to 80 V), the bias voltage at the VAPD pin can be
varied from 6 V to 75 V using the 3 V-compatible VSET pin.
The current sourced from the VAPD pin over a range of 5 nA to
5 mA is accurately mirrored with an attenuation of 5 and
sourced from the IPDM monitor output. In a typical
application, the monitor output drives a current input
logarithmic amplifier to produce an output representing the
optical power incident upon the photodiode. The photodiode
anode can be connected to a high speed transimpedance
amplifier for the extraction of the data stream.
A signal of 0.2 V to 2.5 V with respect to ground applied at the
VSET pin is amplified by a fixed gain of 30 to produce the 6 V
to 75 V bias at Pin VAPD. The accuracy of the bias control
interface of the ADL5317 allows for straightforward calibration,
thereby maintaining a constant avalanche multiplication factor
of the photodiode over temperature. The current monitor
FUNCTIONAL BLOCK DIAGRAM
16
COMM
15
COMM
14
COMM
FALT
1
OVERCURRENT
PROTECTION
THERMAL
PROTECTION
VSET
2
30 × VSET
29 × R
3 VPLV
R
13
COMM
ADL5317
CURRENT
MIRROR
5:1
NC 12
IPDM
11
IAPD
5
NC 10
4 VPHV
VPHV VCLH
56
GARD
7
Figure 1.
IAPD
VAPD
8
GARD 9
output, IPDM, maintains its high linearity vs. photodiode
current over the full range of APD bias voltage. The current
ratio of 5:1 remains constant as VSET and VPHV are varied.
The ADL5317 also offers a supply tracking mode compatible
with adjustable high voltage supplies. The VAPD pin accurately
follows 2.0 V below the VPHV supply pin when VSET is tied to
a voltage from 3.0 V to 5.5 V (or higher with a current limiting
resistor), and the VCLH pin is open.
Protection from excessive input current at VAPD as well as
excessive die temperature is provided. The voltage at VAPD falls
rapidly from its setpoint when the input current exceeds 18 mA
nominally. A die temperature in excess of 140°C will cause the
bias controller and monitor to shut down until the temperature
falls below 120°C. Either overstress condition will trigger a logic
low at the FALT pin, an open collector output loaded by an
external pull-up to an appropriate logic supply (1 mA max).
The ADL5317 is available in a 16-lead LFCSP package and is
specified for operation from −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
1 page  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADL5317
FALT 1
VSET 2
VPLV 3
VPHV 4
PIN 1
INDICATOR
ADL5317
TOP VIEW
(Not to Scale)
12 NC
11 IPDM
10 NC
9 GARD
NC = NO CONNECT
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 FALT
Open Collector (Active Low) Logic Output. Indicates an overcurrent or overtemperature condition.
2 VSET APD Bias Voltage Setting Input. Short to VPLV for supply tracking mode.
3 VPLV Low Voltage Supply, 4 V to 6 V.
4, 5 VPHV
High Voltage Supply, 10 V to 80 V.
6 VCLH Can be shorted to VPHV for extended linear operating range. No connect for supply tracking mode.
7, 9 GARD
Guard pin tracks VAPD pin and filters setpoint buffer noise (with External Capacitor CGRD to COMM). Optional
shielding of VAPD trace. Capacitive load only.
8 VAPD APD Bias Voltage Output and Current Input. Sources current only.
10, 12 NC
Optional shielding of IPDM trace. No connection to die.
11 IPDM
Photodiode Monitor Current Output. Sources current only. Current at this node is equal to IAPD/5.
13 to 16 COMM
Analog Ground.
Rev. 0 | Page 5 of 16
5 Page 
APPLICATIONS
The ADL5317 is primarily designed for wide dynamic range
applications simplifying APD bias circuit architecture. Accurate
control of the bias voltage across the APD becomes critical to
maintain the proper avalanche multiplication factor as the
temperature and input power vary. Figure 21 shows how to use
the ADL5317 with an external temperature sensor to monitor
the ambient temperature of the APD. Using a look-up table and
DAC to drive VSET, it is possible to apply the correct VAPD for
the conditions. Note that Pin 9, Pin 10, and Pin 12 to Pin 15
were removed for simplification.
LOGIC
SUPPLY
COMM
FALT
OVERCURRENT
PROTECTION
THERMAL
PROTECTION
CURRENT
MIRROR
5:1
LOOK-UP
TABLE
AND DAC
VSET
TEMPERATURE
SENSOR
5V VPLV
VPHV
30 × VSET
29 × R
IPDM
R
VCLH
GARD
IAPD
5
IAPD
VAPD
TRANSLINEAR
LOG AMP
OPTICAL
POWER
75V
FROM DC–DC
CONVERTER
CGRD
APD
TIA RECEIVER
DATA
Figure 21. Typical APD Biasing Application Using the ADL5317
In this application, the ADL5317 is operating in linear mode.
The bias voltage to the APD, delivered at Pin VAPD, is
controlled by the voltage (VSET) at Pin VSET. The bias voltage at
VAPD is equal to 30 × VSET.
The range of voltages available at VAPD for a given high voltage
supply is limited to approximately 33 V (or less, for VAPD < 41 V).
This is because the GARD and VAPD pins are clamped to within
~40 V below VPHV, preventing internal device breakdowns.
The input current, IAPD, is divided down by a factor of 5 and
precisely mirrored to Pin IPDM. This interface is optimized for
use with any of the Analog Devices translinear logarithmic
amplifiers (for example, the AD8304 or AD8305) to offer a
precise, wide dynamic range measurement of the optical power
incident upon the APD.
If a voltage output is preferred at IPDM, a single external
resistor to ground is all that is necessary to perform the
conversion. Voltage compliance at IPDM is limited to VPLV or
VAPD/3, whichever is lower.
ADL5317
SUPPLY TRACKING MODE
Some applications for the ADL5317 require a variable dc-to-dc
converter or alternative variable biasing sources to supply
VPHV. For these applications, it is necessary to configure the
ADL5317 for supply tracking mode, shown in Figure 22. In this
mode, the VSET interface is bypassed. However, the full
functionality of the precision current mirror remains available.
5V
16 15 14 13
COMM COMM COMM COMM
FALT
NC 12
1
OVERCURRENT
PROTECTION
CURRENT
MIRROR
5:1
THERMAL
PROTECTION
VSET
2
3V TO 5.5V
30 × VSET
4V TO 6V
3 VPLV
4 VPHV
29 × R
R
IPDM
11
NC 10
GARD 9
LOG
RSSI
VPHV
5
VCLH
6
10V TO 77V
VARIABLE
DC SUPPLY
GARD
7
VAPD
8
8V TO 75V
BIAS ACROSS APD
TIA
DATA
OUT
Figure 22. Supply Tracking Mode
In supply tracking mode, the VSET amplifier is pulled up beyond
its linear operating range and effectively placed into a controlled
saturation. This is done by applying 3.0 V to 5.5 V at the VSET
pin. It is also necessary to remove the connection from VCLH,
which defines the saturation point, to VPHV. Once the ADL5317
is placed into supply tracking mode, VAPD is clamped to 2.0 V
below VPHV.
For those designs where it is desirable to drive VSET from the
VPLV supply, it is necessary to place a 100 kΩ resistor between
VSET and VPLV for VPLV > 5.5 V. This is due to input current
limitations on the VSET pin.
TRANSLINEAR LOG AMP INTERFACING
The monitor current output, IPDM, of the ADL5317 is
designed to interface directly to an Analog Devices translinear
logarithmic amplifier, such as the AD8304, AD8305, or
ADL5306. Figure 23 shows the basic connections necessary for
interfacing the ADL5317 to the AD8305. In this configuration,
the designer is can use the full current mirror range of the
ADL5317 for high accuracy power monitoring.
Rev. 0 | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADL5317.PDF ] | |
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