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PDF IBIS4-6600 Data sheet ( Hoja de datos )
| Número de pieza | IBIS4-6600 | |
| Descripción | High resolution 6.6 M Pixel Rolling shutter CMOS Image sensor | |
| Fabricantes | Cypress Semiconductor | |
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IBIS4-6600
Datasheet
IBIS4-6600
High resolution 6.6 M Pixel
Rolling shutter
CMOS Image sensor
Datasheet
Cypress Semiconductor Corporation 3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: [email protected] Document #: 38-05708 Rev.**(Revision 1.3 )
Page 1 of 63
1 page  
IBIS4-6600
Datasheet
1.2 Key features
6.6 Mpixel resolution: 2210 x 3002 active pixels – progressive scan.
3.5 µm pitch square pixels (based on the high-fill factor active pixel sensor
technology of FillFactory (US patent No. 6,225,670 and others)).
Monochrome or Bayer (RGB) color filters.
Single 2.5V supply; Single master clock.
High pixel rate of 40 MHz using a 40 MHz system clock.
10-bit digital output.
61 dB dynamic range.
High optical dynamic range with double slope integration and Non Destructive
Read out (NDR) modes.
Electronic rolling shutter.
Pixel addressability to support Region-of-Interest windowing and sub
sampling.
On-chip Double Sampling FPN correction.
Digital programmable using a 3-wire Serial-to-Parallel Interface (SPI).
Programmable gain and offset amplifier.
68-pins ceramic LCC package.
1.3 Part number
Part number
IBIS4-6600-M-1
CYII4SM6600AA-HBC – Preliminary
IBIS4-6600-M-2
CYII4SM6600AA-QBC – Preliminary
IBIS4-6600-C-1
CYII4SC6600AA-HAC – Preliminary
IBIS4-6600-C-2
CYII4SC6600AA-QAC – Preliminary
Package
84 pins
JLCC *
68 pins
LCC
84 pins
JLCC
68 pins
LCC
Monochrome
/ color die
Monochrome
Monochrome
Color
Color
Glass lid
Monochrome**
Monochrome
Color***
Color
* JLCC package for use in evaluation kits only.
** D263 is used as monochrome glass lid (see Figure 34 for spectral transmittance).
*** S8612 is used as color glass lid (see Figure 33 for spectral transmittance).
Other packaging combinations are available upon special request.
Cypress Semiconductor Corporation 3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: [email protected] Document #: 38-05708 Rev.**(Revision 1.3 )
Page 5 of 63
5 Page 
IBIS4-6600
Datasheet
3 Sensor architecture and operation
In this part of the document some of the more important specifications will be
discussed more detail.
3.1 Floor plan
SENSOR
IMAGE CORE
pixel array
2210 x 3002
(excl. dark +
dummy pixels)
clk_x
sync_x
Dig. logic
Pixel (0,0)
column amplifiers
addressable x-shift register + sub-sampling
address &
data bus
SPI
DAC
DAC in
Dig. logic
analog output (2)
Figure 3: Block diagram of the IBIS4-6600 CMOS image sensor
Figure 3 shows the architecture of the image sensor that has been designed. It consists
basically of the pixel array, shift registers for the readout in x and y direction, parallel
analog output amplifiers, and column amplifiers that correct for the fixed pattern
noise caused by threshold voltage non-uniformities. Reading out the pixel array starts
by applying a y clock pulse to select a new row, followed by a calibration sequence to
calibrate the column amplifiers (row blanking time). Depending on external bias
resistors and timing, typically this sequence takes about 7 µs per line (baseline). This
sequence is necessary to remove the Fixed Pattern Noise of the pixel and of the
column amplifiers themselves (by means of a Double Sampling technique). Pixels can
Cypress Semiconductor Corporation 3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: [email protected] Document #: 38-05708 Rev.**(Revision 1.3 )
Page 11 of 63
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet IBIS4-6600.PDF ] | |
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