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PDF VSC7121 Data sheet ( Hoja de datos )
| Número de pieza | VSC7121 | |
| Descripción | Quad Port Bypass Circuit | |
| Fabricantes | Vitesse Semiconductor | |
| Logotipo |  |
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VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC7121
Quad Port Bypass Circuit for 1.0625 Gbit/sec
Fibre Channel Arbitrated Loop Disk Arrays
Description
• Supports ANSI X3T11 1.0625 Gbit/sec
FC-AL Disk Attach for Resiliency
• Fully Differential for Minimum
Jitter Accumulation.
• Quad PBC’s in Single Package
• TTL Bypass Select
• High Speed, PECL I/O’s Referenced to VDD.
• 0.5W Typical Power Dissipation
• 3.3V Power Supply
• 44-Pin, 10mm PQFP
The VSC7121 is a Quad Port Bypass Circuit (PBC). Four Fibre Channel PBC’s are cascaded into a single
part to minimize part count, cost, high frequency routing, and jitter accumulation. Port Bypass Circuits are used
to provide resiliency in Fibre Channel Arbitrated Loop (FC-AL) architectures. PBC’s are used within FC-AL
disk arrays to allow for resiliency and hot swapping of FC-AL drives.
A Port Bypass Circuit is a 2:1 Multiplexer with two modes of operation: NORMAL and BYPASS. In NOR-
MAL mode, the disk drive is connected to the loop. Data goes from the 7121’s L_SOn pin to the Disk Drive RX
input and data from the disk drive TX output goes to the 7121’s L_SIn pin. Refer to Figure 2 for disk drive
application. In BYPASS mode, the disk drive is either absent or non-functional and data bypasses to the next
available disk drive. Normal mode is enabled with a HIGH on the SEL pin and BYPASS mode is enabled by a
LOW on the SEL pin. Direct Attach Fibre Channel Disk Drives have an “LRC Interlock” signal defined to con-
trol the SEL function.
Using a VSC7121 in a single loop of a disk array is illustrated in Figure 2: “Disk Array Application”. FC-
AL drives are all expected to be dual loop. The VSC7121 is cascaded in a manner such that all the 7121’s inter-
nal PBC’s are used in the same loop. For dual loop implementations, two or more VSC7121’s should be used.
Allocating each VSC7121 to only one of two loops preserves redundancy, prevents a single point of failure and
lends itself to on-line maintainability.
7121 Block Diagram
1 11 1
IN+
IN-
0 00 0
PBC1
PBC2
PBC3
PBC4
OUT+
OUT-
The VSC7121 can be cascaded through the IN and OUT pins for arrays of disk drives greater than 4. For
disk arrays with a noninteger multiple of 4 disk drives, the unused PBC’s can be hardwired to bypass with a
external pulldown resistor.
G52110-0, Rev. 4.1
8/31/98
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 1
1 page  
VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC7121
Quad Port Bypass Circuit for 1.0625 Gbit/sec
Fibre Channel Arbitrated Loop Disk Arrays
Absolute Maximum Ratings (1)
TTL Power Supply Voltage, (VDD) ..................................................................................................... 0.5V to +4V
PECL DC Input Voltage, (VINP)............................................................................................. -0.5V to VDD +0.5V
TTL DC Input Voltage, (VINT) ..........................................................................................................-0.5V to 5.5V
DC Voltage Applied to Outputs for High Output State, (VIN TTL)........................................ -0.5V to VDD + 0.5V
TTL Output Current (IOUT), (DC, Output High)........................................................................................... 50mA
PECL Output Current, (IOUT), (DC, Output High) ......................................................................................-50mA
Case Temperature Under Bias, (TC) ............................................................................................... -55° to +125oC
Storage Temperature, (TSTG)......................................................................................................... -65° to + 150oC
Maximum Input ESD .................................................................................................................................. 1500 V
Recommended Operating Conditions(2)
Power Supply Voltage, (VDD) ...........................................................................................................+3.1V to 3.5V
Ambient Operating Temperature Range, (T) .....................................................................................0°C to +70°C
Notes:
1) CAUTION: Stresses listed under “Absolute Maximum Ratings” may be applied to devices one at a time without causing per-
manent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended periods may
affect device reliability.
2) Vitesse guarantees the functional and parametric operation of the part under “Recommended Operating Conditions: except
where specifically noted in the AC and DC Parametric Tables
G52110-0, Rev. 4.1
8/31/98
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 5
5 Page 
VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC7121
Quad Port Bypass Circuit for 1.0625 Gbit/sec
Fibre Channel Arbitrated Loop Disk Arrays
Ordering Information
The order number for this product is formed by a combination of the device number and package type.
VSC71XX QM
Device Type
VSC7121 - 1.0625 Gbits/sec Port Bypass Circuit
Package Type
QM: 44 Pin PQFP, 10x10mm Body
Marking Information
The package is marked with three lines of text as shown below (QM Package):
Pin Identifier
Part Number
VITESSE
VSC7121QM
####AAAA
Package Suffix
Date Code
Lot Tracking Code
Notice
Vitesse Semiconductor Corporation reserves the right to make changes in its products specifications or
other information at any time without prior notice. Therefore, the reader is cautioned to confirm that this
datasheet is current prior to placing any orders. The company assumes no responsibility for any circuitry
described other than circuitry entirely embodied in a Vitesse product.
Warning
Vitesse Semiconductor Corporation’s product are not intended for use in life support appliances, devices or
systems. Use of a Vitesse product in such applications without the written consent is prohibited.
G52110-0, Rev. 4.1
8/31/98
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet VSC7121.PDF ] | |
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