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PDF NTL4502N Data sheet ( Hoja de datos )
| Número de pieza | NTL4502N | |
| Descripción | Quad Power MOSFET | |
| Fabricantes | ON Semiconductor | |
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NTL4502N
Quad Power MOSFET
24 V, 15 A, N−Channel, PInPAKt Package
Features
• Four N−Channel MOSFETs in a Single Package
• High Drain Current (Up to 80A per Device, Single Pulse tp < 10 µs,
RqJC = 1.5 °C/W)
• High Input Impedance for Ease of Drive
• Ultra Low On−resistance (RDS(on)) Provides Low Conduction Losses
• Very Fast Switching Times Provides Low Switching Losses
• Low Parasitic Inductance
• Low Stored Charge for Efficient Switching
• Very Low VSD Ideal for Synchronous Rectification
• 200% Footprint Reduction Compared to Similar DPAK Solution for
the Same Power
• Advanced Leadless Power Integrated Package (PInPAK)
Applications
• DC−DC Converters
• Motherboard/Server Voltage Regulator
• Telecomm/Industrial Power Supply
• H−Bridge Circuits
• Low Voltage Motor Control
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Units
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Steady
State
Power Dissipation
(Note 1)
t≤10 s
Steady
State
TA=25°C
TA=85°C
TA=25°C
TA=25°C
VDSS
VGS
ID
PD
24
±20
15
10.9
18.8
2.9
V
V
A
W
t≤10 s
4.5
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Steady
State
TA=25°C
TA=85°C
TA=25°C
ID
PD
11.4 A
8.2
1.7 W
Pulsed Drain Current tp=10 µs
Operating Junction and Storage
Temperature
IDM 32
TJ, TSTG −55 to 150
A
°C
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy – (VDD= 25 V, VG=10 V, IPK=60 A,
L=0.1 mH, RG= 1.0 kW)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IS
EAS
TL
15 A
80 mJ
260 °C
http://onsemi.com
V(BR)DSS
24 V
RDS(ON) TYP
8.0 mΩ @ 4.5 V
11.2 mΩ @ 10 V
ID MAX
(Note 1)
15 A
ÇÇÇ1ÇÇÇ1ÇÇ6
CASE 495
PInPAK
STYLE 1
xx
A
Y
WW
MARKING
DIAGRAM
16
1
NTL4502N
AYWW
= Specific Device Code
= Assembly Location
= Year
= Work Week
S1 D1 G1 S2 D2 G2
1 23 4 56
ÇÇÇÇÇÇÇÇÇÇÇÇÇD1 16
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇD4 15
7 D2
8 D3
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ14 13 12 11 10 9
S4 D4 G4 S3 D3 G3
(Bottom View)
Pinout Diagram
ORDERING INFORMATION
Device
Package
NTL4502NT1
PInPAK
Shipping
1500 / Reel
© Semiconductor Components Industries, LLC, 2003
August, 2003 − Rev. 2
1
Publication Order Number:
NTL4502N/D
1 page  
NTL4502N
2000
Ciss VDS = 0 V
1600
VGS = 0 V
TJ = 25°C
1200
Ciss
Crss
800
400
Coss
Crss
0
−10 −5 0
5
VGS VDS
10 15 20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
6 32
5
4 VDS
3
QGS
2
1
QG(TOT)
QGD
24
VGS
16
ID = 15 A
TJ = 25°C
8
0
0 4 8 12
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and Drain−to−Source
Voltage versus Total Charge
0
1000
100
VDS = 12 V
ID = 15 A
VGS = 4.5 V
tr
td(off)
10 td(on)
tf
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
60
50
40
30
20
10
0
0
TJ = 150°C
TJ = 25°C
0.2 0.4 0.6 0.8
1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage versus
Current
100 VGS = 20 V
SINGLE PULSE
TC = 25°C
10 ms
10
1
0.1
RDS(ON) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
100 ms
1 ms
10 ms
dc
10 100
Figure 11. Maximum Rated Forward Biased Safe Operating Area
http://onsemi.com
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| PDF Descargar | [ Datasheet NTL4502N.PDF ] | |
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