|
|
PDF HMN28D Data sheet ( Hoja de datos )
| Número de pieza | HMN28D | |
| Descripción | Non-Volatile SRAM MODULE 16Kbit | |
| Fabricantes | Hanbit Electronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HMN28D (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
HANBit
HMN28D
Non-Volatile SRAM MODULE 16Kbit (2K x 8-Bit), 24pin DIP, 5V
Part No. HMN28D
GENERAL DESCRIPTION
The HMN28D are 16,384-bit, fully static, nonvolatile SRAM’s organized as 2,048 bytes by 8 bits. Each NVSRAM has a
self-contained lithium energy source and control circuitry, which constantly monitors Vcc for an out-of-tolerance condition.
When such a condition occurs, the lithium energy source is automatically switched on and writes protection is
unconditionally enabled to prevent data corruption. The HMN28D devices can be used in place of existing 2K x 8 SRAM’s
directly conforming to the popular byte wide 24-pin DIP standard. There is no limit on the number of write cycles that can
be executed and no additional support circuitry is required for microprocessor interfacing.
The HMN28D uses extremely low standby current CMOS SRAM’s, coupled with small lithium coin cells to provide non-
volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.
FEATURES
w Access time : 70, 85, 120 and 150ns
w High-density design : 2KByte Design
w Battery internally isolated until power is applied
w JEDEC standard 24-pin DIP Package
w Low-power CMOS
w Unlimited writes cycles
w Data retention in the absence of VCC
w 10-years minimum data retention in absence of power
w Automatic write-protection during power-up/power-down
cycles
w Data is automatically protected during power loss
w Conventional SRAM operation; unlimited write cycles
OPTIONS
w Timing
70 ns
85 ns
120 ns
150 ns
MARKING
-70
-85
-120
-150
PIN ASSIGNMENT
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
DQ0 9
DQ1 10
DQ2 11
Vss 12
24 Vcc
23 A8
22 A9
21 /WE
20 /OE
19 A10
18 /CE
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
24-pin Encapsulated package
URL : www.hbe.co.kr
Rev. 0.0 (April, 2002)
1 HANBit Electronics Co.,Ltd
1 page  
HANBit
HMN28D
READ CYCLE (TA= TOPR, VCCmin £ VCC≤ VCCmax )
PARAMETER
SYMBOL CONDITIONS
-70
-85
-120
-150
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
Read Cycle Time
tRC
70 - 85 - 120 - 150 -
ns
Address Access Time
tACC Output load A - 70 - 85 - 120 - 150 ns
Chip enable access time
tACE Output load A - 70 - 85 - 120 - 150 ns
Output enable to Output valid
tOE Output load A - 35 - 45 - 60 - 70 ns
Chip enable to output in low Z
tCLZ
Output load B
5
-
5
-
5
- 10 -
ns
Output enable to output in low Z
tOLZ
Output load B
5
-
0
-
0
-
5
-
ns
Chip disable to output in high Z
tCHZ Output load B 0 25 0 35 0 45 0 60 ns
Output disable to output high Z
tOHZ Output load B 0 25 0 25 0 35 0 50 ns
Output hold from address change
tOH
Output load A 10 - 10 - 10 - 10 -
ns
WRITE CYCLE (TA= TOPR, Vccmin £ Vcc ≤ Vccmax )
PARAMETER
SYMBOL CONDITIONS
-70
MIN MAX
-85
MIN MAX
-120
MIN MAX
-150
Min Max
Write Cycle Time
tWC
70 - 85 - 120 - 150 -
Chip enable to end of write
tCW
Note 1
65 - 75 - 100 - 100 -
Address setup time
tAS
Note 2
0-0-0-0-
Address valid to end of write
tAW
Note 1
65 - 75 - 100 - 90 -
Write pulse width
tWP
Note 1
55 - 65 - 85 - 90 -
Write recovery time (write cycle 1)
tWR1
Note 3
5-5-5-5-
Write recovery time (write cycle 2)
tWR2
Note 3
15 - 15 - 15 - 15 -
Data valid to end of write
tDW
30 - 35 - 45 - 50 -
Data hold time (write cycle 1)
tDH1
Note 4
0-0-0-0-
Data hold time (write cycle 2)
tDH2
Note 4
10 - 10 - 10 - 0 -
Write enabled to output in high Z
tWZ
Note 5
0 25 0 30 0 40 0 50
Output active from end of write
tOW
Note 5
5-0-0-5-
NOTE: 1. A write ends at the earlier transition of /CE going high and /WE going high.
2. A write occurs during the overlap of allow /CE and a low /WE. A write begins at the later transition of /CE
going low and /WE going low.
3. Either tWR1 or tWR2 must be met.
4. Either tDH1 or tDH2 must be met.
5. If /CE goes low simultaneously with /WE going low or after /WE going low, the outputs remain in high-
impedance state.
UNI
T
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
URL : www.hbe.co.kr
Rev. 0.0 (April, 2002)
5 HANBit Electronics Co.,Ltd
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HMN28D.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HMN28D | Non-Volatile SRAM MODULE 16Kbit | Hanbit Electronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |