ICS87931I Datasheet PDF - ICS
| Part Number | ICS87931I | |
| Description | LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER | |
| Manufacturers | ICS | |
| Logo |  |
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Integrated
Circuit
Systems, Inc.
ICS87931I
LOW SKEW, 1-TO-6
LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
GENERAL DESCRIPTION
The ICS87931I is a low voltage, low skew
,&6 LVCMOS/LVTTL Clock Multiplier/Zero Delay
HiPerClockS™ Buffer and a member of the HiPerClockS™ family
of High Performance Clock Solutions from ICS.
With output frequencies up to 150MHz, the
ICS87931I is targeted for high performance clock applications.
Along with a fully integrated PLL, the ICS87931I contains fre-
quency configurable outputs and an external feedback input for
regenerating clocks with “zero delay”.
Selectable clock inputs, CLK1 and differential CLK0, nCLK0
support redundant clock applications. The CLK_SEL input de-
termines which reference clock is used. The output divider val-
ues of Bank A, B and C are controlled by the DIV_SELA,
DIV_SELB and DIV_SELC, respectively.
For test and system debug purposes, the PLL_SEL input al-
lows the PLL to be bypassed. When LOW, the nMR input re-
sets the internal dividers and forces the outputs to the high im-
pedance state.
The effective fanout of the ICS87931I can be increased to 12
by utilizing the ability of each output to drive two series termi-
nated transmission lines.
FEATURES
• Fully integrated PLL
• 6 LVCMOS/LVTTL outputs, 7Ω typical output impedance
• Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL clock
for redundant clock applications
• Maximum output frequency: 150MHz
• VCO range: 220MHz to 480MHz
• External feedback for “zero delay” clock regeneration
• Output skew, Same Frequency: 300ps (maximum)
• Output skew, Different Frequency: 400ps (maximum)
• Cycle-to-cycle jitter: 100ps (maximum)
• 3.3V supply voltage
• -40°C to 85°C ambient operating temperature
• Pin compatible with MPC931
PIN ASSIGNMENT
BLOCK DIAGRAM
POWER_DN Pullup
PLL_SEL Pullup
CLK_SEL Pulldown
CLK1 Pullup
nc
VDDA
POWER_DN
CLK1
nMR
CLK0
nCLK0
GND
32 31 30 29 28 27 26 25
1 24
2 23
3 ICS87931I 22
4
32-Lead LQFP
21
5 7mm x 7mm x 1.4mm 20
6 package body 19
7
Y package
18
Top View
8 17
9 10 11 12 13 14 15 16
GND
QB0
QB1
VDDO
EXTFB_SEL
CLK_SEL
PLL_SEL
nc
CLK0 Pullup
nCLK0 None
EXTFB_SEL Pulldown
EXT_FB Pullup
DIV_SELA Pulldown
DIV_SELB Pulldown
CLK_EN0
CLK_EN1
DIV_SELC
Pullup
Pullup
Pulldown
nMR Pullup
87931BYI
1
0
PHASE
DETECTOR
VCO
0
0
1
÷2 1
LPF
1
÷8
0
POWER-ON RESET
DISABLE
LOGIC
www.icst.com/products/hiperclocks.html
1
÷2/÷4
÷2/÷4
÷4/÷6
QA0
QA1
QB0
QB1
QC0
QC1
REV. A JUNE 23, 2003
|
| |
 
Integrated
Circuit
Systems, Inc.
ICS87931I
LOW SKEW, 1-TO-6
LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
Inputs, VI
Outputs, VO
Package Thermal Impedance, θJA
Storage Temperature, TSTG
4.6V
-0.5V to VDDA + 0.5 V
-0.5V to VDDO + 0.5V
47.9°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 5A. POWER SUPPLY DC CHARACTERISTICS, VDDA = VDDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
VDDA
V
DDO
IDDA
IDDO
Analog Supply Voltage
Output Supply Voltage
Analog Supply Current
Output Supply Current
3.135
3.135
3.3
3.3
20
100
Maximum
3.465
3.465
Units
V
V
mA
mA
TABLE 5B. LVCMOS/LVTTL DC CHARACTERISTICS, VDDA = VDDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
VIH
Input
High Voltage
DIV_SELA:DIV_SELC,
CLK_EN0, CLK_EN1,
POWER_DN, nMR, CLK_SEL,
PLL_SEL, EXTFB_SEL
Test Conditions
Minimum Typical Maximum Units
2
VDD + 0.3
V
CLK1, EXT_FB
DIV_SELA:DIV_SELC,
CLK_EN0, CLK_EN1,
VIL
Input
POWER_DN, nMR, CLK_SEL,
Low Voltage PLL_SEL, EXTFB_SEL
2 V + 0.3 V
DD
-0.3 0.8 V
CLK1, EXT_FB
-0.3 1.3 V
IIN Input Current
±120
VOH Output High Voltage; NOTE 1
IOH = -20mA
2.4
VOL Output Low Voltage; NOTE 1
IOL = 20mA
0.5
NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement section, 3.3V Output Load Test Circuit.
µA
V
V
TABLE 5C. DIFFERENTIAL DC CHARACTERISTICS, VDDA = VDDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
IIN Input Current
VPP
VCMR
Peak-to-Peak Input Voltage
Common Mode Input Voltage;
NOTE 1, 2
0.15
GND + 0.5
NOTE 1: For single ended applications, the maximum input voltage for CLK0, nCLK0 is VDDA + 0.3V.
NOTE 2: Common mode voltage is defined as VIH.
Maximum
±120
1.3
VDD - 0.85
Units
µA
V
V
87931BYI
www.icst.com/products/hiperclocks.html
5
REV. A JUNE 23, 2003
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for ICS87931I electronic component. |
| Information | Total 14 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ ICS87931I.PDF Datasheet ] | |
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