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PDF HMN1288DV Data sheet ( Hoja de datos )
| Número de pieza | HMN1288DV | |
| Descripción | Non-Volatile SRAM MODULE 1Mbit | |
| Fabricantes | Hanbit | |
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HANBit
HMN1288DV
Non-Volatile SRAM Module 1Mbit (128K x 8-Bit), 32Pin-DIP, 3.3V
Part No. HMN1288DV
GENERAL DESCRIPTION
The HMN1288DV Nonvolatile SRAM is a 1,048,576-bit static RAM organized as 131,072 bytes by 8 bits.
The HMN1288DV has a self-contained lithium energy source provide reliable non -volatility coupled with the unlimited
write cycles of standard SRAM and integral control circuitry, which constantly monitors the single 3.3V, supply for an out-
of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain
the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition
the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy
source is switched on to sustain the memory until after VCC returns valid.
The HMN1288DV uses extremely low standby current CMOS SRAM ’s, coupled with small lithium coin cells to provide
non-volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.
FEATURES
w Access time : 70, 85, 120, 150 ns
w High-density design : 1Mbit Design
w Battery internally isolated until power is applied
w Industry-standard 32-pin 128K x 8 pinout
w Unlimited write cycles
w Data retention in the absence of VCC
w 10-years minimum data retention in absence of power
w Automatic write-protection during power-up/power-down
cycles
w Data is automatically protected during power loss
w Conventional SRAM operation; unlimited write cycles
OPTIONS
w Timing
70 ns
85 ns
120 ns
150 ns
MARKING
- 70
- 85
-120
-150
PIN ASSIGNMENT
NC 1
A16 2
A14 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
32 VCC
31 A15
30 NC
29 /WE
28 A13
27 A8
26 A9
25 A11
24 /OE
23 A10
22 /CE
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
32-pin Encapsulated Package
URL : www.hbe.co.kr
Rev. 1.0 (June, 2004)
1
FinePrint pdfFactory 평 가 판 으 로 만 든 PDFhttp://www.softvision.co.kr
HANBit Electronics Co.,Ltd
1 page  
HANBit
HMN1288DV
READ CYCLE (TA= TOPR, VCCmin ≤ VCC≤ VCCmax )
PARAMETER
SYMBOL
CONDITIONS
-70
-85
-120
-150
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
Read Cycle Time
tRC
70 - 85 - 120 - 150 -
ns
Address Access Time
tACC Output load A - 70 - 85 - 120 - 150 ns
Chip enable access time
tACE Output load A - 70 - 85 - 120 - 150 ns
Output enable to Output valid
tOE Output load A - 35 - 45 - 60 - 70 ns
Chip enable to output in low Z
tCLZ Output load B 5 - 5 - 5 - 10 - ns
Output enable to output in low Z
tOLZ Output load B 5 - 0 - 0 - 5 - ns
Chip disable to output in high Z
tCHZ Output load B 0 25 0 35 0 45 0 60 ns
Output disable to output high Z
tOHZ Output load B 0 25 0 25 0 35 0 50 ns
Output hold from address change
tOH
Output load A 10 - 10 - 10 - 10 -
ns
WRITE CYCLE (TA= TOPR, Vccmin ≤ Vcc ≤ Vccmax )
PARAMETER
SYMBOL CONDITIONS
-70
-85
-120
-150
MIN MAX MIN MAX MIN MAX Min Max
Write Cycle Time
tWC
70 - 85 - 120 - 150 -
Chip enable to end of write
tCW
Note 1
65 - 75 - 100 - 100 -
Address setup time
tAS
Note 2
0-0-0-0-
Address valid to end of write
tAW
Note 1
65 - 75 - 100 - 90 -
Write pulse width
tWP
Note 1
55 - 65 - 85 - 90 -
Write recovery time (write cycle 1)
tWR1
Note 3
5-5-5-5-
Write recovery time (write cycle 2)
tWR2
Note 3
15 - 15 - 15 - 15 -
Data valid to end of write
tDW
30 - 35 - 45 - 50 -
Data hold time (write cycle 1)
tDH1
Note 4
0-0-0-0-
Data hold time (write cycle 2)
tDH2
Note 4
10 - 10 - 10 - 0 -
Write enabled to output in high Z
tWZ
Note 5
0 25 0 30 0 40 0 50
Output active from end of write
tOW
Note 5
5-0-0-5-
NOTE: 1. A write ends at the earlier transition of /CE going high and /WE going high.
2. A write occurs during the over lap of allow /CE and a low /WE. A write begins at the later transition of /CE
going low and /WE going low.
3. Either tWR1 or tWR2 must be met.
4. Either tDH1 or tDH2 must be met.
5. If /CE goes low simultaneously w ith /WE going low or after /WE going low, the outputs remain in high -
impedance state.
UNI
T
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
URL : www.hbe.co.kr
Rev. 1.0 (June, 2004)
5
FinePrint pdfFactory 평 가 판 으 로 만 든 PDF飇htt隻p://www.softvision.co.kr
HANBit Electronics Co.,Ltd
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HMN1288DV.PDF ] | |
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