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PDF HA5340883 Data sheet ( Hoja de datos )
| Número de pieza | HA5340883 | |
| Descripción | High Speed/ Low Distortion/ Precision Monolithic Sample and Hold Amplifier | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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HA5320/883
July 1994
High Speed Precision Sample and Hold Amplifier
Features
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Gain, DC . . . . . . . . . . . . . . . . . . . . . . . . 2 x 106 V/V (Typ)
• Acquisition Time . . . . . . . . . . . . . . . 1.0µs (0.01%) (Typ)
• Droop Rate . . . . . . . . . . . . . . . . 0.08µV/µs (+25oC) (Typ)
17µV/µs (Full Temperature) (Typ)
• Aperture Time. . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Typ)
• Hold Step Error . . . . . . . . . . . . . . . . . . . . . . 1.0mV (Typ)
• Internal Hold Capacitor
• Fully Differential Input
• TTL Compatible
Applications
• High Bandwidth Precision Data Acquisition Systems
• Inertial Navigation and Guidance Systems
• Ultrasonics
• SONAR / RADAR
• Digital to Analog Converter Deglitcher
Description
The HA-5320/883 was designed for use in precision, high speed
data acquisition systems.
The circuit consists of an input transconductance amplifier
capable of providing large amounts of charging current, a low
leakage analog switch, and an output integrating amplifier. The
analog switch sees virtual ground as its load; therefore, charge
injection on the hold capacitor is constant over the entire input/
output voltage range. The pedestal voltage resulting from this
charge injection can be adjusted to zero by use of the offset
adjust inputs. The device includes a hold capacitor. However, if
improved droop rate is required at the expense of acquisition
time, additional hold capacitance may be added externally.
This monolithic device is manufactured using the Intersil
Dielectric Isolation Process, minimizing stray capacitance and
eliminating SCR’s. This allows higher speed and latch-free
operation. For further information, please see Application Note
AN538.
Pinouts
HA-5320/883 (CERDIP)
TOP VIEW
-INPUT 1
14 S/H CONTROL
+INPUT 2
13 SUPPLY GND
OFFSET ADJ 3
12 NC
OFFSET ADJ 4
V- 5
SIG GND 6
11 CEXT
10 NC
9 V+
OUTPUT 7
8 INT. BW
HA-5320/883 (CLCC)
TOP VIEW
3 2 1 20 19
OFFSET ADJ 4
18 NC
NC 5
17 NC
OFFSET ADJ 6
NC 7
16 CEXT
15 NC
V- 8
14 NC
9 10 11 12 13
Ordering Information
PART NUMBER
HA1-5320/883
HA4-5320/883
TEMPERATURE
RANGE
-55oC to +125oC
-55oC to +125oC
PACKAGE
14 Lead CerDIP
20 Lead Ceramic LCC
Functional Diagram
OFFSET
ADJUST
34
V+
9
-INPUT 1
+INPUT 2
HA-5320/883
100pF
-
+
7
OUTPUT
S/H
CONTROL
14
13
SUPPLY
GND
56
V- SIG
GND
11
CEXT
8
INTEGRATOR
BANDWIDTH
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
7-3
Spec Number 511096-883
File Number 2927.3
1 page  
HA-5320/883
Die Characteristics
DIE DIMENSIONS:
92 x 152 x 19 ± 1mils
METALLIZATION:
Type: Al, 1% Cu
Thickness: 16kÅ ± 2kÅ
GLASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos)
Silox Thickness: 12kÅ ± 2kÅ
Nitride Thickness: 3.5kÅ ± 1.5kÅ
WORST CASE CURRENT DENSITY:
1.742 x 105 A/cm2
TRANSISTOR COUNT: 184
SUBSTRATE POTENTIAL: V-
Metallization Mask Layout
HA-5320/883
SUPPLY GND
(13)
CEXT
(11)
V+
(9)
S/H CTRL (14)
-INPUT (1)
+INPUT (2)
(3)
VIO ADJ
(4)
VIO ADJ
(5)
V-
(8) INT BW
(7) OUTPUT
(6) SIG GND
Spec Number 511096-883
7-7
5 Page 
HA-5320
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as applica-
tion and design information only. No guarantee is implied.
Performance Curves VSUPPLY = ±15VDC
TYPICAL SAMPLE AND HOLD PERFORMANCE
AS FUNCTION OF HOLDING CAPACITOR
DRIFT CURRENT vs TEMPERATURE
10 ACQUISITION TIME
FOR 10V STEP TO +0.01%(µs)
5
1000 CH = 100pF, INTERNAL
1.0
0.5
0.1
0.05
0.01
100
VOLTAGE DROOP
DURING HOLD MODE
(mV/100ms)
100
10
SAMPLE-TO-HOLD
OFFSET (HOLD STEP)
ERROR (mV)
1000
10K
CH VALUE (pF)
100K
1.0
-25 0 +25 +50 +75 +100 +125
TEMPERATURE (oC)
OPEN LOOP GAIN AND PHASE RESPONSE
120
100 0
80 45
60 90
θ
40
G
(CH = 100pF)
135
(CH = 1100pF)
G
20 180
0
10 100 1K 10K 100K 1M 10M
FREQUENCY (Hz)
TYPICAL SAMPLE-TO-HOLD OFFSET (HOLD STEP) ERROR
HOLD STEP vs. INPUT VOLTAGE
TA = +25oC
HOLD STEP
VOLTAGE
(mV)
1.0 CH = 100pF
HOLD STEP vs. LOGIC (VIH) VOLTAGE
2.0
CH = 100pF
1.5 +75oC
0.1 CH = 1000pF
0.01 CH = 0.01µF
1.0
+25oC
-10 -8 -6 -4 -2
2 4 6 8 10
DC INPUT (V)
0.5
0.0
234
5
LOGIC LEVEL HIGH (V)
Spec Number 511096-883
7-13
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HA5340883.PDF ] | |
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