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PDF AD8153 Data sheet ( Hoja de datos )
| Número de pieza | AD8153 | |
| Descripción | Single Buffered Mux/Demux Switch | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
3.2 Gbps
Single Buffered Mux/Demux Switch
AD8153
FEATURES
Single lane 2:1 mux/1:2 demux
3.2 Gbps to dc data rates
Compensates over 40 inches of FR4 at 3.2 Gbps through
Two levels of input equalization, or
Four levels of output pre-emphasis
Operates with ac- or dc-coupled differential I/O
Low deterministic jitter, typically 16 ps p-p
Low random jitter, typically 500 fs rms
On-chip terminations
Unicast or bicast on 1:2 demux function
Loopback capability on all ports
3.3 V core supply
Flexible I/O supply
Low power, typically 200 mW in basic configuration1
32-lead LFCSP package
−40°C to +85°C operating temperature range
APPLICATIONS
Low cost redundancy switch
SONET OC48/SDH16 and lower data rates
Gigabit Ethernet over backplane
Fibre Channel 1.06 Gbps and 2.12 Gbps over backplane
Serial RapidIO
PCI Express Gen 1
Infiniband over backplane
GENERAL DESCRIPTION
The AD8153 is an asynchronous, protocol agnostic, single-lane
2:1 switch with three differential CML inputs and three differential
CML outputs. The AD8159, another member of the Xstream
line of products, is suitable for similar applications that require
more than one lane.
The AD8153 is optimized for NRZ signaling with data rates of
up to 3.2 Gbps per port. Each port offers two levels of input
equalization and four levels of output pre-emphasis.
The device consists of a 2:1 multiplexer and a 1:2 demultiplexer.
There are three operating modes: pin mode, serial mode, and
mixed mode. In pin mode, lane switching, equalization, and
pre-emphasis are controlled exclusively using external pins. In
serial mode, an I2C interface is used to control the device and to
FUNCTIONAL BLOCK DIAGRAM
INPUT A
RECEIVE
EQUALIZATION
EQ
TRANSMIT
PRE-EMPHASIS
INPUT B
OUTPUT A
OUTPUT B
EQ
RECEIVE
EQUALIZATION
EQ
TRANSMIT
2:1 MULTIPLEXER/
PRE-EMPHASIS 1:2 DEMULTIPLEXER
AD8153
CONTROL
LOGIC
Figure 1.
OUTPUT C
INPUT C
SEL
BICAST
LB_A
LB_B
LB_C
MODE
RESETB
EQ_A/(SCL)
EQ_B/(SDA)
EQ_C
PE_A/(I2C_A[0])
PE_B/(I2C_A[1])
PE_C/(I2C_A[2])
provide access to advanced features, such as additional pre-
emphasis settings and output disable. In mixed mode, the user
accesses the advanced features using I2C, but controls lane
switching using the external pins.
The main application of the AD8153 is to support redundancy
on both the backplane side and the line interface side of a serial
link. The device has unicast and bicast capability, so it is capable
of supporting either 1 + 1 or 1:1 redundancy.
Using a mixture of bicast and loopback modes, the AD8153 can
also be used to test high speed serial links by duplicating the
incoming data and transmitting it to the destination port and
test equipment simultaneously.
1 Two ports active with no pre-emphasis.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VCC to VEE
VTTI
VTTO
Internal Power Dissipation
Differential Input Voltage
Logic Input Voltage
Storage Temperature Range
Lead Temperature
Junction Temperature
Rating
3.7 V
VCC + 0.6 V
VCC + 0.6 V
4.1 W
2.0 V
VEE − 0.3V < VIN < VCC + 0.6 V
−65°C to +125°C
300°C
150°C
AD8153
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. A | Page 5 of 24
5 Page 
Data Sheet
80
70
60
50
40
30
20
10
0
3.0
80
70
60
50
40
30
20
10
0
–40
700
DETERMINISTIC JITTER
RANDOM JITTER
3.1 3.2 3.3 3.4 3.5
VCC (V)
Figure 23. Jitter vs. Core Supply Voltage
DETERMINISTIC JITTER
RANDOM JITTER
–20 0 20 40 60
TEMPERATURE (°C)
Figure 24. Jitter vs. Temperature
80
3.6
100
650
600
550
500
3.0 3.1 3.2 3.3 3.4 3.5 3.6
VCC (V)
Figure 25. Propagation Delay vs. Core Supply Voltage
AD8153
80
70
60
50
40
30
20 DETERMINISTIC JITTER
10
RANDOM JITTER
0
2 2.2 2.4 2.6 2.8 3.0 3.2 3.4
VTTO (V)
Figure 26. Jitter vs. Output Termination Voltage
100
3.6
95
90
85
80
75
–40
700
–20 0
20 40 60 80
TEMPERATURE (°C)
Figure 27. Rise/Fall Time vs. Temperature
100
650
600
550
500
–40
–20
0 20 40 60
TEMPERATURE (°C)
80 100
Figure 28. Propagation Delay vs. Temperature
Rev. A | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet AD8153.PDF ] | |
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