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PDF PE4235 Data sheet ( Hoja de datos )

Número de pieza PE4235
Descripción SPDT UltraCMOS RF Switch DC
Fabricantes Peregrine Semiconductor 
Logotipo Peregrine Semiconductor Logotipo



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Product Description
The PE4235 RF Switch is designed to cover a broad range of
applications from near DC to 4000 MHz. This single-supply
reflective switch integrates on-board CMOS control logic
driven by a simple, single-pin CMOS or TTL control input.
Using a nominal +3-volt power supply, a 1 dB compression
point of +15 dBm can be achieved. The PE4235 also exhibits
outstanding isolation of better than 40 dB at 1000 MHz and is
offered in a small 3x3 mm DFN package.
The PE4235 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Diagram
RFC
RF1 RF2
Product Specification
PE4235
SPDT UltraCMOS™ RF Switch
DC - 4000 MHz
Features
Single 3.0-volt power supply
Low insertion loss: 0.40 dB at
1000 MHz, 0.45 dB at 2000 MHz
High isolation of 40 dB at 1000 MHz,
30 dB at 2000 MHz
Typical 1 dB compression point of
+15 dBm
Single-pin CMOS or TTL logic control
Available in a 6-lead DFN package
Figure 2. Package Type
6-lead DFN
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )
Parameter
Operating Frequency1
Insertion Loss
Conditions
1000 MHz
2000 MHz
Minimum
DC
Typical
0.40
0.45
Isolation – RFC to RF1/RF2
1000 MHz
2000 MHz
39 40
29 30
Isolation – RF1 to RF2
1000 MHz
2000 MHz
36 37
28 29
Return Loss
1000 MHz
2000 MHz
20 22
17 19
‘ON’ Switching Time
‘OFF’ Switching Time
Video Feedthrough2
Input 1 dB Compression
Input IP3
CTRL to 0.1 dB final value, 2 GHz
CTRL to 25 dB isolation, 2 GHz
2000 MHz
2000 MHz, 5 dBm
13.5
32.5
200
90
2.5
15
36
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to
High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
Maximum
4000
0.50
0.60
Units
MHz
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
mVpp
dBm
dBm
Document No. 70-0069-03 www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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PE4235 pdf
PE4235
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4235 SPDT switch. The RF common port is
connected through a 50 transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 transmission lines to the top
two SMA connectors on the right side of the board,
J2 and J3. A through transmission line connects
SMA connectors J4 and J5. This transmission line
can be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide with ground plane model using
a trace width of 0.0476”, trace gaps of 0.030”,
dielectric thickness of 0.028”, metal thickness of
0.0021” and εr of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left pin,
the second pin to the right (J6-3) is connected to the
device CTRL input. The fourth pin to the right (J6-7)
is connected to the device VDD input. A decoupling
capacitor (100 pF) is provided on both CTRL and
VDD traces. It is the responsibility of the customer to
determine proper supply decoupling for their design
application. Removing these components from the
evaluation board has not been shown to degrade RF
performance.
Figure 12. Evaluation Board Layouts
Peregrine Specification 101/0085
Figure 13. Evaluation Board Schematic
Peregrine Specification 102/0108
Document No. 70-0069-03 www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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