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PDF NTMD6N02R2 Data sheet ( Hoja de datos )
| Número de pieza | NTMD6N02R2 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMD6N02R2
Power MOSFET
6.0 Amps, 20 Volts
N−Channel Enhancement Mode
Dual SO−8 Package
Features
• Ultra Low RDS(on)
• Higher Efficiency Extending Battery Life
• Logic Level Gate Drive
• Miniature Dual SO−8 Surface Mount Package
• Diode Exhibits High Speed, Soft Recovery
• Avalanche Energy Specified
• SO−8 Mounting Information Provided
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery−Powered Products, for
example, Computers, Printers, Cellular and Cordless Telephones and
PCMCIA Cards
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
VDSS
20
Drain−to−Gate Voltage (RGS = 1.0 MW)
VDGR
20
Gate−to−Source Voltage − Continuous
VGS "12
Thermal Resistance −
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4)
RθJA
PD
ID
ID
IDM
62.5
2.0
6.5
5.5
50
Thermal Resistance −
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4)
RθJA
PD
ID
ID
IDM
102
1.22
5.07
4.07
40
Thermal Resistance −
Junction−to−Ambient (Note 3)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4)
RθJA
PD
ID
ID
IDM
172
0.73
3.92
3.14
30
1. Mounted onto a 2″ square FR−4 Board
(1″ sq. 2 oz. Cu 0.06″ thick single sided), t < 10 seconds.
2. Mounted onto a 2″ square FR−4 Board
(1″ sq. 2 oz. Cu 0.06″ thick single sided), t = steady state.
3. Minimum FR−4 or G−10 PCB, t = steady state.
4. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%.
V
V
V
°C/W
W
A
A
A
°C/W
W
A
A
A
°C/W
W
A
A
A
http://onsemi.com
VDSS
20 V
RDS(ON) TYP
35 mΩ @ VGS = 4.5 V
ID MAX
6.0 A
N−Channel
D
G
S
8
1
SO−8
CASE 751
STYLE 11
MARKING DIAGRAM
& PIN ASSIGNMENT
Source 1
Gate 1
Source 2
Gate 2
1
2
3
4
E6N02
LYWW
8
Drain 1
7
Drain 1
6
Drain 2
5
Drain 2
(Top View)
E6N02 = Device Code
L = Assembly Location
Y = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping†
NTMD6N02R2
SO−8
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
April, 2004 − Rev. 2
1
Publication Order Number:
NTMD6N02R2/D
1 page  
NTMD6N02R2
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
5
VGS = 0 V
4 TJ = 25°C
3
2
1
0
0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
100
VGS = 20 V
SINGLE PULSE
TC = 25°C
10
100 µs
1 ms
10 ms
1
0.1
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
dc
1 10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
IS
tp
di/dt
trr
ta tb
0.25 IS
IS
TIME
Figure 12. Diode Reverse Recovery Waveform
TYPICAL ELECTRICAL CHARACTERISTICS
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
0.001
1.0E−05 1.0E−04
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
RθJC(t) = r(t) RθJC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) RθJC(t)
1.0E−03
1.0E−02
1.0E−01
t, TIME (s)
1.0E+00
1.0E+01 1.0E+02 1.0E+03
Figure 13. Thermal Response
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