|
|
PDF S72NS128N Data sheet ( Hoja de datos )
| Número de pieza | S72NS128N | |
| Descripción | Based MCPs | |
| Fabricantes | SPANSION | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de S72NS128N (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
S72NS-N Based MCPs
Stacked Multi-Chip Product (MCP) MirrorBitTM Flash Memory & DRAM
128 Mb (8 M x 16 bit)/256 Mb (16 M x 16 bit),
110nm CMOS 1.8 Volt-only, Multiplexed, Simultaneous Read/Write,
Burst Mode Flash Memory and 128/256-Mb (8/16-M x 16-bit) DDR
DRAM
Data Sheet
ADVANCE
INFORMATION
Notice to Readers: The Advance Information status indicates that this
document contains information on one or more products under development
at Spansion LLC. The information is intended to help you evaluate this product.
Do not design in this product without contacting the factory. Spansion LLC
reserves the right to change or discontinue work on this proposed product
without notice.
Publication Number S72NS128_256ND0_00 Revision B Amendment 1 Issue Date November 9, 2005
1 page  
Advance Information
1 MCP Block Diagrams
F-RST#
F-VPP
F-WP#
F-CE#
F-OE#
F-WE#
AVD#
F-VSS
F2-CE#
D-RAS#
D-CAS#
D-BA0
D-BA1
D-CKE
D-WE#
D-Amax - D-A0
D-VCC
D-VCCQ
RST#
VPP
WP#
CE#
OE#
WE#
AVD#
VSS
A15-A0
MUX
Flash
Memory
NS-N
DQ15-DQ0
CLK
RDY
A16-Amax
VCC
VCCQ
Second NS-N (if needed)
RAS#
CAS#
BA0
BA1
CKE
WE#
VCC
VCCQ
DDR
DRAM
Memory
CLK
CLK#
DQS0
DQS1
LDQM
UDQM
TEST
DQ15-DQ0
VSS
VSSQ
ADQ15-ADQ0
F-CLK
F-RDY
A16-Amax
F-VCC
F-VCCQ
D-CLK
D-CLK#
D-LDQS
D-UDQS
D-LDQM
D-UDQM
D-TEST
D-DQ15 - D-DQ0
D-VSS
D-VSSQ
(Note 3)
Notes:
1. Amax indicates highest address bit for memory component:
a. Amax = A23 for NS256N, A22 for NS128N
b. Amax = A11 for 128 Mb DDR DRAM, A12 for 256-Mb DDR DRAM
2. For Flash, A0 – A15 is tied to DQ0 – DQ15.
3. For the NS512N, two NS-N devices are included. All signals are common to both except for CE#. F-CE# becomes F1-CE#, while the CE#
for the second flash is F2-CE#. This way, the two NS-N devices are separately accessed.
Figure 1.1. MCP Block Diagram
November 9, 2005 S72NS128_256ND0_00_B1
S72NS-N Based MCPs
3
5 Page 
Advance Information
4 Ordering Information
The order number (Valid Combination) is formed by the following:
S72NS 256 N D0 AF W 7 K 0
PACKING TYPE
0 = Tray
2 = 7-inch Tape and Reel
3 = 13-inch Tape and Reel
MODEL NUMBER
K = DRAM Type 1, 66 MHz Flash/133 MHz DRAM
J = DRAM Type 1, 80 MHz Flash/133 MHz DRAM
3 = DRAM Type 5, 66 MHz Flash/133 MHz DRAM
2 = DRAM Type 5, 80 MHz Flash/133 MHz DRAM
PACKAGE MODIFIER
7 = DDR DRAM, 133-ball, 11x10 mm, FBGA Multi-chip Package
1 = DDR DRAM, 133-ball, 8.0x8.0 mm, FBGA Multi-chip Package
TEMPERATURE RANGE
W = Wireless (-25°C to +85°C)
PACKAGE TYPE
AF = Thin profile Fine-pitch BGA Pb-free package
(0.5 mm pitch, 1.0 mm height)
AJ = Thin profile Fine-pitch BGA Pb-free LF35 package
(0.5 mm pitch, 1.0 mm height)
ZJ = Thin profile Fine-pitch BGA Pb-free LF35 package
(0.5 mm pitch, 1.2 mm height)
DRAM AND DATA FLASH DENSITY
D0 = 128 Mb DRAM, No Data Flash
E0 = 256 Mb DRAM, No Data Flash
PROCESS TECHNOLOGY
N = 110 nm, MirrorBitTM Technology
CODE FLASH DENSITY
512 = 512 Mb
256 = 256 Mb
128 = 128 Mb
PRODUCT FAMILY
S72NS Multi-Chip Product (MCP)
1.8 V Multiplexed, SRW, Burst Mode Flash and DDR DRAM on Split Bus
Product
Family
S72NS
Code Flash
Density
(Mb)
128
256
512
Process
Technology
N
DRAM
Density
(Mb)
Valid Combinations
Package Type/
Marking/
Material
Temperature
Range
D0 AF, AJ
E0 ZJ
W
Package
Modifier
1
7
Model
Number
K, J, 2, 3
Packing
Type
0, 2, 3
Notes:
1. Packing Type 0 is standard. Specify other options as required.
2. BGA package marking omits leading “S” and packing type
designator from ordering part number.
Valid Combinations
Valid Combinations list configurations planned to be supported in vol-
ume for this device. Consult your local sales office to confirm avail-
ability of specific valid combinations and to check on newly released
combinations.
November 9, 2005 S72NS128_256ND0_00_B1
S72NS-N Based MCPs
9
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet S72NS128N.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| S72NS128N | Based MCPs | SPANSION |
| S72NS128P | MirrorBit Flash Memory and DRAM | SPANSION |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |