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PDF S29CD032G Data sheet ( Hoja de datos )

Número de pieza S29CD032G
Descripción Simultaneous Read/ Write Flash Memory
Fabricantes SPANSION 
Logotipo SPANSION Logotipo



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S29CD-G Flash Family
S29CD032G, S29CD016G
32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit)
2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/
Write Flash Memory with VersatileI/O™ featuring 170 nm
Process Technology
Data Sheet
PRELIMINARY
Notice to Readers: This document states the current technical specifications
regarding the Spansion product(s) described herein. The Preliminary status of
this document indicates that product qualification has been completed, and
that initial production has begun. Due to the phases of the manufacturing
process that require maintaining efficiency and quality, this document may be
revised by subsequent versions or modifications due to changes in technical
specifications.
Note: This document supercedes datasheet information for the S29CD016G revision A4, and
S29CD032G revision B0. The S29CD-G device is the factory-recommended migration path.
Please refer to specifications and ordering information found in this document.
Publication Number S29CD-G_00 Revision B Amendment 0 Issue Date November 14, 2005
This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not
design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice.

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S29CD032G pdf
Preliminary
Hardware data protection measures include a low VCC detector that automatically inhibits write
operations during power transitions. The password and software sector protection feature
disables both program and erase operations in any combination of sectors of memory. This can
be achieved in-system at VCC level.
The Program/Erase Suspend/Erase Resume feature enables the user to put erase on hold
for any period of time to read data from, or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The hardware RESET# pin terminates any operation in progress and resets the internal state
machine to reading array data.
The device offers two power-saving features. When addresses are stable for a specified amount
of time, the device enters the automatic sleep mode. The system can also place the device into
the standby mode. Power consumption is greatly reduced in both these modes.
AMD’s Flash technology combines years of Flash memory manufacturing experience to produce
the highest levels of quality, reliability and cost effectiveness. The device electrically erases all
bits within a sector simultaneously via Fowler-Nordheim tunnelling. The data is programmed
using hot electron injection.
November 14, 2005 S29CD-G_00_B0
S29CD-G Flash Family
3

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S29CD032G arduino
Preliminary
Product Selector Guide
Part Number
Standard Voltage Range:
VCC = 2.5 – 2.75 V
VIO = 1.65 – 2.75 V
Speed Option (Clock Rate)
Max Initial/Asynchronous Access Time, ns (tACC)
Max Burst Access Delay (ns)
Max Clock Rate (MHz)
Min Initial Clock Delay (clock cycles)
Max CE# Access, ns (tCE)
Max OE# Access, ns (tOE)
0R
(75 MHz)
(32 Mb Only)
48
7.5 FBGA
75
3
52
S29CD-G Flash Family
(S29CD032G, S29CD016G)
Synchronous/Burst or Asynchronous
0P
(66 MHz)
54
9 FBGA/
9.5 PQFP
66
3
58
20
0M
(56 MHz)
64
10 FBGA/
10 PQFP
56
3
69
0J
(40 MHz)
67
17
40
2
71
28
November 14, 2005 S29CD-G_00_B0
S29CD-G Flash Family
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