PDF M366S1623ET0 Data sheet ( Hoja de datos )

Número de pieza	M366S1623ET0
Descripción	Synchronous DRAMs
Fabricantes	Samsung semiconductor
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No Preview Available ! www.DataSheet4U.com M366S1623ET0 Revision History Revision 0.0 (Dec, 2000) • PC133 first published. PC133 Unbuffered DIMM REV. 0.0 Dec, 2000 1 page M366S1623ET0 PC133 Unbuffered DIMM ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on VDD supply relative to Vss Storage temperature Power dissipation Short circuit current Symbol VIN, VOUT VDD, VDDQ TSTG PD IOS Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 16 50 Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. Unit V V °C W mA DC OPERATING CONDITIONS AND CHARACTERISTICS Recommended operating conditions (Voltage referenced to VSS = 0V, TA = 0 to 70°C) Parameter Supply voltage Input logic high voltage Input logic low voltage Output logic high voltage Output logic low voltage Input leakage current Symbol VDD, VDDQ VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 - -10 Typ Max 3.3 3.6 3.0 VDDQ+0.3 0 0.8 -- - 0.4 - 10 Unit V V V V V uA Note : 1. VIH (max) = 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. VIL (min) = -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ VIN ≤ VDDQ. Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. Note 1 2 IOH = -2mA IOL = 2mA 3 CAPACITANCE (VDD = 3.3V, TA = 23°C, f = 1MHz, VREF = 1.4V ± 200 mV) Pin Symbol Min Address (A0 ~ A11, BA0 ~ BA1) RAS, CAS, WE CKE (CKE0 ~ CKE1) Clock (CLK0 ~ CLK3) CS (CS0, CS2) DQM (DQM0 ~ DQM7) DQ (DQ0 ~ DQ63) CADD CIN CCKE CCLK CCS CDQM COUT 70 70 45 35 25 15 10 Max 95 95 55 40 30 20 15 Unit pF pF pF pF pF pF pF REV. 0.0 Dec, 2000 5 Page M366S1623ET0 PC133 Unbuffered DIMM M366S1623ET0-C75(Intel SPD 1.2B ver. base) ¡Ü Organization : 16Mx64 ¡Ü Composition : 8Mx8 *16 ¡Ü Used component part # : K4S640832E-TC75 ¡Ü # of rows in module : 2 rows ¡Ü # of banks in component : 4 banks ¡Ü Feature : 1,375mil height & double sided component ¡Ü Refresh : 4K/64ms ¡Ü Contents ; Byte # Function Described 0 # of bytes written into serial memory at module manufacturer 1 Total # of bytes of SPD memory device 2 Fundamental memory type 3 # of row address on this assembly 4 # of column address on this assembly 5 # of module rows on this assembly 6 Data width of this assembly 7 ...... Data width of this assembly 8 Voltage interface standard of this assembly 9 SDRAM cycle time @CAS latency of 3 10 SDRAM access time from clock @CAS latency of 3 11 DIMM configuraion type 12 Refresh rate & type 13 Primary SDRAM width 14 Error checking SDRAM width 15 Minimum clock delay for back-to-back random column address 16 SDRAM device attributes : Burst lengths supported 17 SDRAM device attributes : # of banks on SDRAM device 18 SDRAM device attributes : CAS latency 19 SDRAM device attributes : CS latency 20 SDRAM device attributes : Write latency 21 SDRAM module attributes 22 SDRAM device attributes : General 23 SDRAM cycle time @CAS latency of 2 24 SDRAM access time from clock@CAS latency of 2 25 SDRAM cycle time @CAS latency of 1 26 SDRAM access time from clock@CAS latency of 1 27 Minimum row precharge time (=tRP) 28 Minimum row active to row active delay (tRRD) 29 Minimum RAS to CAS delay (=tRCD) 30 Minimum activate precharge time (=tRAS) 31 Module row density 32 Command and address signal input setup time 33 Command and address signal input hold time 34 Data signal input setup time Function Supported -75 128bytes 256bytes (2K-bit) SDRAM 12 9 2 rows 64 bits - LVTTL 7.5ns 5.4ns Non parity 15.625us, support self refresh x8 None tCCD = 1CLK 1, 2, 4, 8 & full page 4 banks 3 0 CLK 0 CLK Non-buffered, non-registered & redundant addressing +/- 10% voltage tolerance, Burst Read Single bit Write precharge all, auto precharge - - - - 20ns 15ns 20ns 45ns 2 rows of 64MB 1.5ns 0.8ns 1.5ns Hex value -75 80h 08h 04h 0Ch 09h 02h 40h 00h 01h 75h 54h 00h 80h 08h 00h 01h 8Fh 04h 04h 01h 01h 00h 0Eh 00h 00h 00h 00h 14h 0Fh 14h 2Dh 10h 15h 08h 15h Note 1 1 2 2 2 2 REV. 0.0 Dec, 2000 11 Page

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