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PDF HY29F800A Data sheet ( Hoja de datos )
| Número de pieza | HY29F800A | |
| Descripción | Flash Memory | |
| Fabricantes | Hynix Semiconductor | |
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HY29F800A
8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory
KEY FEATURES
n 5 Volt Read, Program, and Erase
– Minimizes system-level power requirements
n High Performance
– Access times as fast as 50 ns
n Low Power Consumption
– 20 mA typical active read current in byte
mode, 28 mA typical in word mode
– 35 mA typical program/erase current
– 5 µA maximum CMOS standby current
n Compatible with JEDEC Standards
– Package, pinout and command-set
compatible with the single-supply Flash
device standard
– Provides superior inadvertent write
protection
n Sector Erase Architecture
– Boot sector architecture with top and
bottom boot block options available
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
and fifteen 64 Kbyte sectors in byte mode
– One 8 Kword, two 4 Kword, one 16 Kword
and fifteen 32 Kword sectors in word mode
– A command can erase any combination of
sectors
– Supports full chip erase
n Erase Suspend/Resume
– Temporarily suspends a sector erase
operation to allow data to be read from, or
programmed into, any sector not being
erased
GENERAL DESCRIPTION
The HY29F800A is an 8 Megabit, 5 volt only CMOS
Flash memory organized as 1,048,576 (1M) bytes
or 524,288 (512K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F800A can be programmed and erased
in-system with a single 5-volt VCC supply. Internally
generated and regulated voltages are provided for
program and erase operations, so that the device
does not require a high voltage power supply to
perform those functions. The device can also be
programmed in standard EPROM programmers.
Access times as fast as 55 ns over the full operat-
ing voltage range of 5.0 volts ± 10% are offered for
timing compatibility with the zero wait state require-
ments of high speed microprocessors. A 50 ns
n Sector Protection
– Any combination of sectors may be locked
to prevent program or erase operations
within those sectors
n Temporary Sector Unprotect
– Allows changes in locked sectors
(requires high voltage on RESET# pin)
n Internal Erase Algorithm
– Automatically erases a sector, any
combination of sectors, or the entire chip
n Internal Programming Algorithm
– Automatically programs and verifies data
at a specified address
n Fast Program and Erase Times
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 19 sec typical
n Data# Polling and Toggle Status Bits
– Provide software confirmation of
completion of program or erase
operations
n Ready/Busy# Output (RY/BY#)
– Provides hardware confirmation of
completion of program and erase
operations
n Minimum 100,000 Program/Erase Cycles
n Space Efficient Packaging
– Available in industry-standard 44-pin
PSOP and 48-pin TSOP and reverse
TSOP packages
LOGIC DIAGRAM
19
A[18:0]
CE#
OE#
WE#
RESET#
BYTE#
DQ[7:0]
DQ[14:8]
DQ[15]/A-1
RY/BY#
8
7
Preliminary
Revision 1.1, February 2002
1 page  
HY29F800A
Table 1. HY29F800A Memory Array Organization
Device
Sector
Size
(KB/KW)
Sector Address 1
A[18] A[17] A[16] A[15] A[14] A[13] A[12]
Byte Mode
Address Range 2
Word Mode
Address Range 3
S0 64/32 0 0 0 0 X X X 0x00000 - 0x0FFFF 0x00000 - 0x07FFF
S1 64/32 0 0 0 1 X X X 0x10000 - 0x1FFFF 0x08000 - 0x0FFFF
S2 64/32 0 0 1 0 X X X 0x20000 - 0x2FFFF 0x10000 - 0x17FFF
S3 64/32 0 0 1 1 X X X 0x30000 - 0x3FFFF 0x18000 - 0x1FFFF
S4 64/32 0 1 0 0 X X X 0x40000 - 0x4FFFF 0x20000 - 0x27FFF
S5 64/32 0 1 0 1 X X X 0x50000 - 0x5FFFF 0x28000 - 0x2FFFF
S6 64/32 0 1 1 0 X X X 0x60000 - 0x6FFFF 0x30000 - 0x37FFF
S7 64/32 0 1 1 1 X X X 0x70000 - 0x7FFFF 0x38000 - 0x3FFFF
S8 64/32 1 0 0 0 X X X 0x80000 - 0x8FFFF 0x40000 - 0x47FFF
S9 64/32 1 0 0 1 X X X 0x90000 - 0x9FFFF 0x48000 - 0x4FFFF
S10 64/32 1 0 1 0 X X X 0xA0000 - 0xAFFFF 0x50000 - 0x57FFF
S11 64/32 1 0 1 1 X X X 0xB0000 - 0xBFFFF 0x58000 - 0x5FFFF
S12 64/32 1 1 0 0 X X X 0xC0000 - 0xCFFFF 0x60000 - 0x67FFF
S13 64/32 1 1 0 1 X X X 0xD0000 - 0xDFFFF 0x68000 - 0x6FFFF
S14 64/32 1 1 1 0 X X X 0xE0000 - 0xEFFFF 0x70000 - 0x77FFF
S15 32/16 1 1 1 1 0 X X 0xF0000 - 0xF7FFF 0x78000 - 0x7BFFF
S16 8/4
1 1 1 1 1 0 0 0xF8000 - 0xF9FFF 0x7C000 - 0x7CFFF
S17 8/4
1 1 1 1 1 0 1 0xFA000 - 0xFBFFF 0x7D000 - 0x7DFFF
S18 16/8 1 1 1 1 1 1 X 0xFC000 - 0xFFFFF 0x7E000 - 0x7FFFF
S0 16/8 0 0 0 0 0 0 X 0x00000 - 0x03FFF 0x00000 - 0x01FFF
S1 8/4 0 0 0 0 0 1 0 0x04000 - 0x05FFF 0x02000 - 0x02FFF
S2 8/4 0 0 0 0 0 1 1 0x06000 - 0x07FFF 0x03000 - 0x03FFF
S3 32/16 0 0 0 0 1 X X 0x08000 - 0x0FFFF 0x04000 - 0x07FFF
S4 64/32 0 0 0 1 X X X 0x10000 - 0x1FFFF 0x08000 - 0x0FFFF
S5 64/32 0 0 1 0 X X X 0x20000 - 0x2FFFF 0x10000 - 0x17FFF
S6 64/32 0 0 1 1 X X X 0x30000 - 0x3FFFF 0x18000 - 0x1FFFF
S7 64/32 0 1 0 0 X X X 0x40000 - 0x4FFFF 0x20000 - 0x27FFF
S8 64/32 0 1 0 1 X X X 0x50000 - 0x5FFFF 0x28000 - 0x2FFFF
S9 64/32 0 1 1 0 X X X 0x60000 - 0x6FFFF 0x30000 - 0x37FFF
S10 64/32 0 1 1 1 X X X 0x70000 - 0x7FFFF 0x38000 - 0x3FFFF
S11 64/32 1 0 0 0 X X X 0x80000 - 0x8FFFF 0x40000 - 0x47FFF
S12 64/32 1 0 0 1 X X X 0x90000 - 0x9FFFF 0x48000 - 0x4FFFF
S13 64/32 1 0 1 0 X X X 0xA0000 - 0xAFFFF 0x50000 - 0x57FFF
S14 64/32 1 0 1 1 X X X 0xB0000 - 0xBFFFF 0x58000 - 0x5FFFF
S15 64/32 1 1 0 0 X X X 0xC0000 - 0xCFFFF 0x60000 - 0x67FFF
S16 64/32 1 1 0 1 X X X 0xD0000 - 0xDFFFF 0x68000 - 0x6FFFF
S17 64/32 1 1 1 0 X X X 0xE0000 - 0xEFFFF 0x70000 - 0x77FFF
S18 64/32 1 1 1 1 X X X 0xF0000 - 0xFFFFF 0x78000 - 0x7FFFF
Notes:
1. X indicates Don’t Care.
2. Address in Byte Mode is A[18:-1].
3. Address in Word Mode is A[18:0].
Rev. 1.1/Feb 02
5
5 Page 
Table 5. HY29F800A Command Sequences
Bus Cycles 1, 2, 3
Command Sequence
Write
First
Second
Third
Fo u r t h
Fif t h
Six t h
Cycles Add Data Add Data Add Data Add Data Add Data Add Data
Read/Reset 1 6, 8
1 XXX F0 RA RD
Reset/Reset 2 7, 8
Word 3 555 AA 2AA 55 555 F0 RA RD
Byte AAA 555 AAA
Program
Word 555 2AA 555
4 AA 55 A0 PA PD
Byte AAA 555 AAA
Chip Erase
Word 555 2AA 555 555 2AA 555
Byte
6 AAA AA 555 55 AAA 80 AAA AA 555 55 AAA 10
Sector Erase
Word 6 555 AA 2AA 55 555 80 555 AA 2AA 55 SA 30
Byte
AAA
555
AAA
AAA
555
Erase Suspend 4
1 XXX B0
Erase Resume 5
1 XXX 30
Manufacturer Code
Word 555 2AA 555
3 AA 55 90 X00 AD
Byte AAA 555 AAA
Device Code
Word 555 2AA 555 X01 22D6 (Top Boot), 2258 (Bottom Boot)
Byte 3 AAA AA 555 55 AAA 90 X02 D6 (Top Boot), 58 (Bottom Boot)
Sector Protect Verify
Word 555 2AA 555 (SA)X02
3 AA 55 90 STATUS
Byte
AAA
555
AAA
(SA)X04
Legend:
X = Don’t Care
PA = Address of the data to be programmed
RA = Memory address of data to be read
PD = Data to be programmed at address PA
RD = Data read from location RA during the read operation
SA = Sector address of sector to be erased or verified (see Note 3 and Table 1).
STATUS = Sector protect status: 0x00 = unprotected, 0x01 = protected.
Notes:
1. All values are in hexadecimal. DQ[15:8] are don’t care for unlock and command cycles.
2. All bus cycles are write operations unless otherwise noted.
3. Address is A[10:0] in Word mode and A[10:-1] in Byte mode. A[18:11] are don’t care except as follows:
• For RA and PA, A[18:11] are the upper address bits of the byte to be read or programmed.
• For the sixth cycle of Sector Erase, SA = A[18:12] are the sector address of the sector to be erased.
• For the fourth cycle of Sector Protect Verify, SA = A[18:12] are the sector address of the sector to be verified.
4. The Erase Suspend command is valid only during a sector erase operation. The system may read and program in non-erasing sectors, or enter the Electronic
ID mode, while in the Erase Suspend mode.
5. The Erase Resume command is valid only during the Erase Suspend mode.
6. The second bus cycle is a read cycle.
7. The fourth bus cycle is a read cycle.
8. Either command sequence is valid. The command is required only to return to the Read mode when the device is in the Electronic ID command mode or if
DQ[5] goes High during a program or erase operation. It is not required for normal read operations.
11 Page | ||
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| PDF Descargar | [ Datasheet HY29F800A.PDF ] | |
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