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PDF ADTL084 Data sheet ( Hoja de datos )

Número de pieza ADTL084
Descripción (ADTL082 / ADTL084) Low Cost JFET Input Operational Amplifiers
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Preliminary Technical Data
FEATURES
TL082 / TL084 compatible
Low input bias current: 10 pA max
Offset voltage: 5mV max (ADTL082A/ADTL084A)
9 mV max (ADTL082/ADTL084)
±5 V to ±15 V operation
Low noise: 15 nV/√Hz
Wide bandwidth: 6 MHz
Slew rate: 20V/µs
CMRR: 80 dB min
Total Harmonic Distortion: 0.003 %
Supply current: 1.2 mA typ
Unity-gain stable
APPLICATIONS
General purpose amplification
Power control and monitoring
Active filters
Industrial / process control
Data acquisition
Sample and hold circuits
Integrators
Input buffering
GENERAL DESCRIPTION
The ADTL082 and ADTL084 are JFET-input amplifiers
providing industry-leading performance over TL08x devices.
The ADTL082A and ADTL084A are improved versions of
TL08x A-, I- and Q- grades. The ADTL082 and ADTL084 offer
improvements over the TL08x standard and C-grades.
The ADTL08x family offers lower noise, offset voltage, offset
drift over temperature, and bias current over the TL08x. In
addition, the ADLT08x family has better common-mode
rejection and slew rate.
These op amps are ideal for various applications including
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Low Cost JFET Input
Operational Amplifiers
ADTL082/ADTL084
PIN CONFIGURATIONS
OUT A
-IN A
+ IN A
-V
1 AD8682 /
2 AADDTTLL008822
3 TOP VIEW
4 (Not to Scale)
8 +V
7 OUT B
6 - IN B
5 + IN B
Figure 1. 8-Lead SOIC (R-8)
OUT A 1
8 V+
-IN A 2 ADTL082A 7 OUT B
+IN A 3 TOP VIEW 6 -IN B
V- 4 (Not to Scale) 5 +IN B
Figure 2. 8-Lead MSOP (RM-8)
OUT A
IN A-
+ IN A
+V
+ IN B
IN B-
OUT B
1 14 OUT D
2 AD8684 / 13 - IN D
3 AADDTTLL008844 12 + IN D
4 TOP VIEW 11 - V
5 ((NNoott ttoo SSccaallee)) 10 + IN C
6 9 - IN C
7 8 OUT C
Figure 3. 14-Lead SOIC (R-14)
OUT A 1
-IN A 2
+IN A 3
V+ 4
+IN B 5
-IN B 6
OUT B 7
ADTL084A
TOP VIEW
(Not to Scale)
14 OUT D
13 -IN D
12 +IN D
11 V-
10 +IN C
9 -IN C
8 OUT C
Figure 4. 14-Lead TSSOP (RU-14)
process control, industrial and instrumentation equipment,
active filtering, data conversion, buffering, and power control
and monitoring.
The A-grade amplifiers are available in lead-free packaging.
The standard grades are available in both leaded and lead-free
packaging. For high precision grades of these devices, see the
ADA4000-2 (dual) and ADA4000-4 (quad).
The ADTL082A and ADTL084A are specified over the extended
industrial (-40° to 125°C) temperature range. The ADTL082 and
ADTL084 are specified over the commercial (0° to 70°C)
temperature range.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.

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ADTL084 pdf
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ADTL082/ADTL084
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
5
6.20 (0.2440)
4 5.80 (0.2284)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
1.27 (0.0500)
BSC
1.75 (0.0688)
1.35 (0.0532)
0.50 (0.0196) × 45°
0.25 (0.0099)
0.51 (0.0201)
SEATING 0.31 (0.0122)
PLANE
0.25 (0.0098) 0° 1.27 (0.0500)
0.17 (0.0067) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 22. 8-Lead Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
3.20
3.00
2.80
8
1
5 5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
SEATING
PLANE
0.23
0.08
0.80
0.60
0.40
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 23. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Preliminary Technical Data
5.10
5.00
4.90
4.50
4.40
4.30
14
8
6.40
BSC
17
PIN 1
1.05 0.65
1.00 BSC
0.80
1.20 0.20
MAX 0.09
0.15 0.30
0.05 0.19
SEATING
PLANE COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
0.75
0.60
0.45
Figure 24. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
8.75 (0.3445)
8.55 (0.3366)
4.00 (0.1575) 14
3.80 (0.1496) 1
8 6.20 (0.2441)
7 5.80 (0.2283)
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
1.27 (0.0500)
BSC
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197) × 45°
0.25 (0.0098)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
0.25 (0.0098) 0° 1.27 (0.0500)
0.17 (0.0067) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 25. 14-LeadStandard Small Outline Package [SOIC]
(R-14)
Dimensions shown in millimeters
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