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PDF NE55410GR Data sheet ( Hoja de datos )

Número de pieza NE55410GR
Descripción N-CHANNEL SILICON POWER LDMOS FET
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LDMOS FIELD EFFECT TRANSISTOR
NE55410GR
N-CHANNEL SILICON POWER LDMOS FET
FOR 2 W + 10 W VHF to L-BAND SINGLE-END POWER AMPLIFIER
DESCRIPTION
The NE55410GR is an N-channel enhancement-mode LDMOS FET designed for driver 0.1 to 2.6 GHz PA, such
as, cellular base station amplifier, analog/digital TV-transmitters, and the other PA’s. This product has two different
FET's on one die manufactured using our NEWMOS technology (our WSi gate lateral MOS FET), and its nitride
surface passivation and quadruple layer aluminum silicon metalization offer a high degree of reliability.
FEATURES
• Two different FET’s (Q1 : Pout = 2 W, Q2 : Pout = 10 W) in one package
• Over 25 dB gain available by connecting two FET’s in series
: GL (Q1) = 13.5 dB TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz)
: GL (Q2) = 11.0 dB TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz)
• High 1 dB compression output power : PO (1 dB) (Q1) = 35.4 dBm TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz)
: PO (1 dB) (Q2) = 40.4 dBm TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz)
• High drain efficiency
: ηd (Q1) = 52% TYP. (VDS = 28 V, IDset (Q1) = 20 mA, f = 2 140 MHz)
: ηd (Q2) = 46% TYP. (VDS = 28 V, IDset (Q2) = 100 mA, f = 2 140 MHz)
• Low intermodulation distortion
: IM3 (Q1) = 40 dBc TYP. (VDS = 28 V, IDset (Q1+Q2) = 120 mA,
f = 2 132.5/2 147.5 MHz, Pout = 33 dBm (2 tones) )
• Single Supply (VDS : 3 V < VDS 30 V)
• Excellent Thermal Stability
• Surface mount type and Super low cost plastic package : 16-pin plastic HTSSOP
• Integrated ESD protection
• Excellent stability against HCI (Hot Carrier Injection)
APPLICATION
• Digital cellular base station PA : W-CDMA/GSM/D-AMPS/PDC/N-CDMA/PCS etc.
• UHF-band TV transmitter PA
Caution Observe precautions when handling because these devices are sensitive to electrostatic discharge.
Document No. PU10542EJ02V0DS (2nd edition)
Date Published June 2005 CP(K)
The mark  shows major revised points.

1 page




NE55410GR pdf
NE55410GR
TYPICAL CHARACTERISTICS (TA = +25°C, VDS = 28 V, IDset = 120 mA, unless otherwise specified)
GAIN, DRAIN EFFICIENCY,
vs. OUTPUT POWER
36 f = 840 MHz
860 MHz
34 880 MHz
900 MHz
32 920 MHz
30
G
28
ηd
26
24
22
20
20
25 30 35 40
Output Power Pout (dBm)
80
70
60
50
40
30
20
10
0
45
IM3/IM5 vs. 2 TONES OUTPUT POWER
–10
Lower
Upper
–20
IM3
–30
–40
–50
–60
–70
15
IM5
CW, f = 960 MHz,
1 MHz Spacing
20 25 30 35 40 45
2 tones Output Power Pout (dBm)
GAIN, DRAIN EFFICIENCY,
vs. OUTPUT POWER
30 80
28 70
26 60
G
24 50
22 40
20
18
16
14
20
ηd
f = 2.09 GHz
2.11 GHz
2.14 GHz
2.17 GHz
2.19 GHz
25 30 35 40
Output Power Pout (dBm)
30
20
10
0
45
IM3/IM5, DRAIN EFFICIENCY,
vs. 2 TONES OUTPUT POWER
–20
–25
Lower
Upper
–30
–35
–40
IM3
IM5
100
90
80
70
60
–45 50
–50 40
–55 30
ηd
–60 20
–65 10
–70 0
15 20 25 30 35 40 45
2 tones Output Power Pout (dBm)
W-CDMA 3GPP, Test Model 1,
64 DPCH, 67% Clipping,
Center Frequency 2.14GHz,
15 MHz spacing
Remark The graphs indicate nominal characteristics.
Data Sheet PU10542EJ02V0DS
5

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NE55410GR arduino
PACKAGE DIMENSIONS
16-PIN PLASTIC HTSSOP (UNIT: mm)
6.4±0.3
0.20±0.10
98
NE55410GR
(1.8)
16
5.2±0.2
1
0.9±0.2
(1.5)
Remark ( ): Reference value
LAND PATTERN (UNIT: mm)
6.40
5.20
0.10
(2.5)
(0.1)
0.50
Remarks1. Via holes : 158 holes
2. Hole size : φ 0.25 mm
3. Min. spacing : 0.354 mm
4. : Solder resist or etching
1.50
4.00
0.48
Data Sheet PU10542EJ02V0DS
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