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PDF AD8386 Data sheet ( Hoja de datos )
| Número de pieza | AD8386 | |
| Descripción | 12-Channel Output Decimating LCD Driver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
High voltage drive
To within 1.3 V of supply rails
Output short-circuit protection
High update rates
Fast, 100 Ms/s 10-bit input data update rate
Static power dissipation: 1.4 W
Voltage-controlled video reference (brightness), offset,
and full-scale (contrast) output levels
INV bit reverses polarity of video signal
3.3 V logic, 9 V to 18 V analog supplies
High accuracy voltage outputs
Laser trimming eliminates the need for adjustments or
calibration
Flexible logic
XFR allows parallel AD8386 operation
Fast settling into capacitive loads
35 ns settling time to 0.25% into 150 pF load
Slew rate 400 V/μs
Available in 64-lead 9 mm × 9 mm LFCSP_VQ
GENERAL DESCRIPTION
The AD8386 provides a fast, 10-bit, latched, decimating digital
input that drives 12 high voltage outputs. Input words with
10 bits are loaded sequentially into 12 separate high speed,
bipolar DACs. Flexible digital input format allows several
AD8386s to be used in parallel in high resolution displays.
The output signal can be adjusted for dc reference, signal
inversion, and contrast for maximum flexibility.
The AD8386 is fabricated on ADI’s fast bipolar, 26 V XFHV
process, which provides fast input logic, bipolar DACs with
trimmed accuracy and fast settling, high voltage, precision
drive amplifiers on the same chip.
The AD8386 dissipates 1.4 W nominal static power.
The AD8386 is offered in a 64-lead 9 mm × 9 mm LFCSP_VQ
package and operates over the commercial temperature range of
0°C to 85°C.
10-Bit, 12-Channel Output
Decimating LCD Driver
AD8386
FUNCTIONAL BLOCK DIAGRAM
BYP
VRH
VRH
VRL
DB(0:9)
2
10
R/L
CLK
XFR
3
INV
GCTL
GSW
TSW
SDI
SCL
SEN
SVRH
SVRL
SVRL
3
3
2
BIAS
SCALING
CONTROL
TWO-STAGE 10-BIT
LATCH
DACs
SEQUENCE
CONTROL
INV
CONTROL
12-BIT
SHIFT
REGISTER
8-BIT
DAC
Figure 1.
VID0
VID1
VID2
VID3
VID4
12 VID5
VID6
VID7
VID8
VID9
VID10
VID11
VAO
AD8386
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD8386
SERIAL INTERFACE SECTION
At 25°C, AVCC = 15.5 V, DVCC = 3.3 V, TA MIN = 0°C, TA MAX = 85°C, VRH = 9.5 V, VRL = 7 V, unless otherwise noted.
Table 2.
Parameter
SERIAL DAC DC PERFORMANCE
DNL
INL
Output Offset Error
Scale Factor Error
SERIAL DAC OUTPUT DYNAMIC PERFORMANCE
VAO Settling Time, t26
VAO Settling Time, t26
SERIAL DAC OUTPUT CHARACTERISTICS
VAO Maximum
VAO Minimum
VAO − Grounded Mode
VAO Output Resistance
IOUT
CLOAD Low Range1
CLOAD High Range1
REFERENCE INPUTS
SVRH Range
SVRL Range
SVFS Range
SVRH Input Current
SVRL Input Current
DIGITAL INPUT CHARACTERISTICS
CIN
IIH
IIL
VIH
VIL
VTH
DIGITAL TIMING CHARACTERISTICS
SEN to SCL Setup Time, t20
SCL, High Level Pulse Width, t21
SCL, Low Level Pulse Width, t22
SCL to SEN Hold Time, t23
SDI Setup Time, t24
SDI Hold Time, t25
POWER SUPPLIES
DVCC, Operating Range
DVCC, Quiescent Current
AVCC Operating Range
Total AVCC Quiescent Current
OPERATING TEMPERATURES
Ambient Temperature Range, TA2
Ambient Temperature Range, TA2
Conditions
SVFS = 5 V
SVFS = 5 V
To 0.5%
CL = 100 pF
CL = 33 μF
All supplies OFF
SVRL < SVRH
SVRL < SVRH
SVRS = 5 V
SVRS = 5 V
TA MIN to TA MAX
Still air, TSW = HIGH
Still air, TSW = LOW
Min Typ
Max
−1 +1
−1.5 +1.5
−2.0 +2.0
−3.0 +3.0
12
15
0.047
SVRH − 1 LSB
SVRL
150
75
±30
0.002
SVRL + 1
AGND + 1.5
1
−1.6
0.1
−1.3
AVCC − 3.5
SVRH − 1
8
2.0
DGND
0.05
−1
1.65
3
DVCC
0.8
10
10
10
10
10
10
3 3.3 3.6
54 75
9 18
80 100
0 70
0 85
Unit
LSB
LSB
LSB
LSB
μs
ms
V
V
mV
kΩ
mA
μF
μF
V
V
V
μA
mA
pF
μA
μA
V
V
V
ns
ns
ns
ns
ns
ns
V
mA
V
mA
°C
°C
1 Output VAO is designed to drive capacitive loads less than 0.002 μF or more than 0.047 μF. Load capacitances in the range 0.002 μF − 0.047 μF cause the output
overshoot to exceed 100 mV.
2 Operation at high ambient temperature requires a thermally optimized PCB layout (see the Applications section). In systems with limited or no airflow, the maximum
ambient operating temperature is limited to 70°C with the thermal protection enabled, VFS = 4 V, data update rate = 85 Ms/s. Operation at 85°C ambient temperature
requires the thermal protection circuit turned disabled (TSW = LOW).
Rev. 0 | Page 5 of 20
5 Page 
AD8386
CLK
DB(0:9)
tr
t1
t7
t2
tf
t1
t8
t2
XFR
t4
t3
VTH
Figure 5. Input Timing
VTH
VTH
CLK
DB(0:9)
XFR
INV
VRL + VFS
VID(0:11)
VRL
t9
–9 –8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
t11 MAX
50%
t11 MIN
t9
PIXELS
–12, –11, –10, –9, –8, –7, –6, –5, –4, –3, –2, –1
t10 VRL
VRL – VFS
t12
PIXELS
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
Figure 6. Output Timing (R/L LOW)
Table 5.
Parameter
Data Setup Time, t1
Data Hold Time, t2
XFR Setup Time, t3
XFR Hold Time, t4
CLK High Time, t7
CLK Low Time, t8
Data Switching Delay, t9
Invert Switching Delay, t10
Invert Setup Time, t11
Invert Hold Time, t12
Conditions
Input tr, tf = 2 ns
Min Typ Max
1
3.5
0
4.5
6
4
12 14 16
15 17 19
0
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AD8386.PDF ] | |
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