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Numéro de référence | JN5121 | ||
Description | IEEE802.15.4 Wireless Microcontroller | ||
Fabricant | Jennic | ||
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Data Sheet – JN5121
IEEE802.15.4 Wireless Microcontroller
Overview
The JN5121 is the first in a series of low power, low cost IEEE802.15.4 compliant
wireless microcontrollers. Combining an on chip 32-bit RISC core, a fully compliant
2.4GHz IEEE802.15.4 transceiver, 64Kb of ROM and 96Kb of RAM, provides a
versatile low cost solution for wireless sensor networking applications. The high level
of integration helps to reduce the overall system cost. In particular, the ROM enables
integration of point-to-point and mesh network stack protocols, and the RAM allows
support of router and controller functions without the need for additional external
memory. The JN5121 uses hardware MAC and highly secure AES encryption
accelerators for low power and minimum processor overhead. Integrated sleep
oscillator and power saving facilities are provided, giving low system power
consumption. The device also incorporates a wide range of digital and analogue
peripherals for the user to connect to their application.
Block Diagram
2.4GHz
Radio
XTAL
Power
Management
O-QPSK
Modem
IEEE802.15.4
MAC
Accelerator
128-bit AES
Encryption
Accelerator
RAM
96kb
ROM
64kb
RISC CPU
SPI
2-wire serial
Timers
UARTs
12-bit ADC,
comparators
11-bit DACs,
temp sensor
Benefits
• Single chip solution with integrated
transceiver and microcontroller for
wireless sensor networks
• Capacity and power efficient
microcontroller for both controllers
and sensor units
• Low application BOM cost and
size
• Hardware MAC ensures low power
consumption and low processor
overhead
• Extensive user peripherals
Applications
• Robust and secure low power
wireless applications
• Wireless sensor networks,
particularly IEEE802.15.4 /
ZigBee systems
• Home and commercial building
automation
• Home networks
• Toys and gaming peripherals
• Industrial systems
• Telemetry and utilities
(e.g. AMR)
Features: Transceiver
• 2.4GHz IEEE802.15.4
compliant
• Security processor (128-bit
AES)
• MAC accelerator with packet
formatting, CRCs, address
check, auto-acks, timers
• Integrated power management
and sleep oscillator for low
power
• On-chip power regulation for
2.2V to 3.6V battery operation
• Sleep current (with active
beacon timer) < 5µA
• Minimum of external
components at < US$1 cost
• Rx current < 50mA
• Tx current < 40mA
• Receiver sensitivity -93dBm
• Transmit power +1dBm
Features: Microcontroller
• 16MHz 32-bit RISC optimised
for low power (3MIPS/mA) and
efficient code density
• 96k RAM for shared program,
data and routing tables
• 64k ROM for program code
• 4-input 12-bit ADC, 2 11-bit
DACs, 2 comparators,
temperature sensor
• 2 Application timer/counters,
3 system timers
• 2 UARTs (one for in-system
debug)
• SPI port with 5 selects
• 2 wire serial interface
• 21 GPIO
Industrial temperature range
(-40°C to +85°C)
8x8mm 56 lead QFN package
Lead-free and RoHS compliant
i
JN-DS-JN5121 v1.2
© Jennic 2005
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Pages | Pages 30 | ||
Télécharger | [ JN5121 ] |
No | Description détaillée | Fabricant |
JN5121 | IEEE802.15.4 Wireless Microcontroller | Jennic |
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TSPC106 | PCI Bus Bridge Memory Controller | ATMEL |
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