DataSheetWiki


DP83256 fiches techniques PDF

National Semiconductor - (DP83256 / DP83257) PLAYER Device

Numéro de référence DP83256
Description (DP83256 / DP83257) PLAYER Device
Fabricant National Semiconductor 
Logo National Semiconductor 





1 Page

No Preview Available !





DP83256 fiche technique
www.DataSheet4U.com
PRELIMINARY
October 1994
DP83256 56-AP 57
PLAYERa TM Device (FDDI Physical Layer Controller)
General Description
The DP83256 56-AP 57 Enhanced Physical Layer Control-
ler (PLAYERa device) implements one complete Physical
Layer (PHY) entity as defined by the Fiber Distributed Data
Interface (FDDI) ANSI X3T9 5 standard
The PLAYERa device integrates state of the art digital
clock recovery and improved clock generation functions to
enhance performance eliminate external components and
remove critical layout requirements
FDDI Station Management (SMT) is aided by Link Error
Monitoring support Noise Event Timer (TNE) support Op-
tional Auto Scrubbing support an integrated configuration
switch and built-in functionality designed to remove all strin-
gent response time requirements such as PC React and
CF React
Features
Y Single chip FDDI Physical Layer (PHY) solution
Y Integrated Digital Clock Recovery Module provides en-
hanced tracking and greater lock acquisition range
Y Integrated Clock Generation Module provides all neces-
sary clock signals for an FDDI system from an external
12 5 MHz reference
Y Alternate PMD Interface (DP83256-AP 57) supports
UTP twisted pair FDDI PMDs with no external clock re-
covery or clock generation functions required
Y No External Filter Components
Y Connection Management (CMT) Support (LEM TNE
PC React CF React Auto Scrubbing)
Y Full on-chip configuration switch
Y Low Power CMOS-BIPOLAR design using a single 5V
supply
Y Full duplex operation with through parity
Y Separate management interface (Control Bus)
Y Selectable Parity on PHY-MAC Interface and Control
Bus Interface
Y Two levels of on-chip loopback
Y 4B 5B encoder decoder
Y Framing logic
Y Elasticity Buffer Repeat Filter and Smoother
Y Line state detector generator
Y Supports single attach stations dual attach stations
and concentrators with no external logic
Y DP83256 for SAS DAS single path stations
Y DP83257 for SAS DAS single dual path stations
Y DP83256-AP for SAS DAS single path stations that re-
quire the alternate PMD interface
TL F 11708 – 1
FIGURE 1-1 FDDI Chip Set Overview
TRI-STATE is a registered trademark of National Semiconductor Corporation
BMACTM BSITM CDDTM CDLTM CRDTM CYCLONETM MACSITM PLAYERTM PLAYERaTM and TWISTERTM are trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 11708
RRD-B30M115 Printed in U S A

PagesPages 70
Télécharger [ DP83256 ]


Fiche technique recommandé

No Description détaillée Fabricant
DP83251 (DP83251 / DP83255) PLAYER Device National Semiconductor
National Semiconductor
DP83255 (DP83251 / DP83255) PLAYER Device National Semiconductor
National Semiconductor
DP83256 DP83256 DP83257 PLAYER+ Device (FDDI Physical Layer Controller) (Rev. A) Texas Instruments
Texas Instruments
DP83256 (DP83256 / DP83257) PLAYER Device National Semiconductor
National Semiconductor

US18650VTC5A

Lithium-Ion Battery

Sony
Sony
TSPC106

PCI Bus Bridge Memory Controller

ATMEL
ATMEL
TP9380

NPN SILICON RF POWER TRANSISTOR

Advanced Semiconductor
Advanced Semiconductor


www.DataSheetWiki.com    |   2020   |   Contactez-nous  |   Recherche