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PDF HFCT-5903E Data sheet ( Hoja de datos )

Número de pieza HFCT-5903E
Descripción MT-RJ Duplex Single Mode Transceiver
Fabricantes Hewlett-Packard 
Logotipo Hewlett-Packard Logotipo



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Agilent HFCT-5903E MT-RJ Duplex
Single Mode Transceiver
Data Sheet
Description
The HFCT-5903E transceiver is a
high performance, cost effective
module for serial optical data
communications applications
specified for a signal rate of
125 MBd. It is designed to provide
an FDDI SMF-PMD1 link for FDDI
or Fast Ethernet applications and
is also compatible with ATM/
SONET/SDH transceivers. The
HFCT-5903 does not include a nose
shield and is not recommended
due to the potential degradation
of EMI performance in a complete
system. The HFCT-5903 is
available on the rare occasion that
a system mechanical design may
not allow for a nose shield.
It incorporates Agilent’s high
performance, reliable, long
wavelength optical devices and
proven circuit technology to give
long life and consistent service.
The transmitter section uses an
advanced SMQW Fabry Perot
laser with full IEC 825 and CDRH
Class I eye safety.
The receiver section uses a
MOVPE grown planar PIN
photodetector for low dark
current and excellent
responsivity.
A pseudo-ECL logic interface
simplifies interface to external
circuitry.
This module is designed for single
mode fiber and operates at a
nominal wavelength of 1300 nm.
Features
• MT-RJ duplex single mode
transceiver
• Power compliant to ANSI
X3.184- 1993 standard for FDDI
SMF-PMD category 1
optoelectronic performance
• Single +3.3 V power supply
• Multisourced 2 x 5 pin
configuration
• Interchangeable with LED
multisourced 2 x 5 transceivers
• Unconditionally eye safe
laser IEC 825/CDRH Class 1
compliant
• Temperature range:
0°C to +70°C
Applications
• FDDI SMF-PMD1
• Fast ethernet
• ATM compatible

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HFCT-5903E pdf
Interface and Termination
Recommendations
Figure 3 shows a +3.3 V coupling
scheme. Also present are power
supply filtering arrangements
which comply with the
recommendations of the small
form factor multisource
agreement. Such a compliance
ensures noise rejection
compatibility between
transceivers from various
vendors.
TERMINATE AT
TRANSCEIVER INPUTS
100 W
WZ = 50
WZ = 50
10 9 8 7 6
fffff
1 µH VCC (+3.3 V)
TX C2 C3 10 µF
RX
1 µH

fffff
12345
C1
WZ = 50
WZ = 50
130 W 130 W
WZ = 50
Note: C1 = C2 = C3 = 10 nF or 100 nF
Figure 3. +3.3 V Transceiver Interface with +3.3 V LVPECL Device
5
PHY DEVICE
VCC (+3.3 V)
TD-
130 W 130 W
TD+
LVPECL
VCC (+3.3 V)
100 W
VCC (+3.3 V)
130 W
82 W
RD+
RD-
SD
LVPECL
TERMINATE AT
DEVICE INPUTS

5 Page





HFCT-5903E arduino
Board Layout - Decoupling Circuit
and Ground Planes
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these transceivers. Figure 3
provides a good example of a
schematic for a power supply
decoupling circuit that works well
with these parts. It is further
recommended that a continuous
ground plane be provided in the
circuit board directly under the
transceiver to provide a low
inductance ground for signal
return current. This recommenda-
tion is in keeping with good high
frequency board layout practices.
Board Layout - Hole Pattern
The Agilent transceiver complies
with the circuit board “Common
Transceiver Footprint” hole
pattern defined in the original
multisource announcement which
defined the 2 x 5 package style.
This drawing is reproduced in
Figure 6 with the addition of ANSI
Y14.5M compliant dimensioning
to be used as a guide in the
mechanical layout of your circuit
board. Figure 7 shows the front
panel dimensions associated with
such a layout.
KEEP OUT AREA
FOR PORT PLUG
7
(0.276)
10.8
(0.425)
Ø 1.4 ±0.1
(0.055 ±0.004)
7.11
(0.28)
Ø 1.4 ±0.1
(0.055 ±0.004)
3.56
(0.14)
Holes For
Housing
Leads
10.16
(0.4)
13.97
(0.55)
MIN.
Ø 1.4 ±0.1
(0.055 ±0.004)
13.34 7.59
(0.525) (0.299)
3.08
(0.121)
9.59
(0.378)
2
(0.079)
3
(0.118)
3
(0.118)
6
27 (0.236)
(1.063)
4.57
(0.18)
1.778
(0.07)
17.78
(0.7)
7.112
(0.28)
Ø 2.29
(0.09)
3.08
(0.121)
Ø 0.81 ±0.1
(0.032 ±0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
NOTES:
1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE MT-RJ TRANSCEIVER PLACED
AT .550 SPACING.
2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES OR
GROUND CONNECTION IN KEEP-OUT AREAS.
3. 2 x 5 TRANSCEIVER MODULE REQUIRES 16 PCB HOLES (10 I/O PINS, 2 SOLDER POSTS AND 4 PACKAGE
GROUNDING TABS).
PACKAGE GROUNDING TABS SHOULD BE CONNECTED TO SIGNAL GROUND.
4. THE SOLDER POSTS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL INTEGRITY AND TO
ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS.
Figure 6. Recommended Board Layout Hole Pattern
11

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