|
|
Número de pieza | IDT72T20118 | |
Descripción | (IDT72T20xxx) DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION | |
Fabricantes | Integrated Device Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de IDT72T20118 (archivo pdf) en la parte inferior de esta página. Total 51 Páginas | ||
No Preview Available ! www.DataSheet4U.com
2.5 VOLT HIGH-SPEED TeraSync™ DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION
32,768 x 20/65,536 x 10, 65,536 x 20/131,072 x 10
131,072 x 20/262,144 x 10, 262,144 x 20/524,288 x 10
IDT72T2098, IDT72T20108
IDT72T20118, IDT72T20128
FEATURES:
• Choose among the following memory organizations:
IDT72T2098 32,768 x 20/65,536 x 10
IDT72T20108 65,536 x 20/131,072 x 10
IDT72T20118 131,072 x 20/262,144 x 10
IDT72T20128 262,144 x 20/524,288 x 10
• Up to 250MHz Operation of Clocks
- 4ns read/write cycle time, 3.2ns access time
• Users selectable input port to output port data rates, 500Mb/s
Data Rate
-DDR to DDR
-DDR to SDR
-SDR to DDR
-SDR to SDR
• User selectable HSTL or LVTTL I/Os
• Read Enable & Read Clock Echo outputs aid high speed operation
• 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage
• 3.3V Input tolerant
• Mark & Retransmit, resets read pointer to user marked position
• Write Chip Select (WCS) input enables/disables Write
Operations
• Read Chip Select (RCS) synchronous to RCLK
• Programmable Almost-Empty and Almost-Full flags, each flag
can default to one of four preselected offsets
• Dedicated serial clock input for serial programming of flag offsets
• User selectable input and output port bus sizing
-x20 in to x20 out
-x20 in to x10 out
-x10 in to x20 out
-x10 in to x10 out
• Auto power down minimizes standby power consumption
• Master Reset clears entire FIFO
• Partial Reset clears data, but retains programmable settings
• Empty and Full flags signal FIFO status
• Select IDT Standard timing (using EF and FF flags) or First
Word Fall Through timing (using OR and IR flags)
• Output enable puts data outputs into High-Impedance state
• JTAG port, provided for Boundary Scan function
• 208 Ball Grid array (PBGA), 17mm x 17mm, 1mm pitch
• Easily expandable in depth and width
• Independent Read and Write Clocks (permit reading and writing
simultaneously)
• High-performance submicron CMOS technology
• Industrial temperature range (-40°C to +85°C) is available
FUNCTIONAL BLOCK DIAGRAM
WEN
WCLK
D0 -Dn (x20, x10)
SREN SEN SCLK
WCS WSDR
INPUT REGISTER
OFFSET REGISTER
SI
SO
WRITE CONTROL
LOGIC
WRITE POINTER
RAM ARRAY
32,768 x 20 or 65,536 x 10
65,536 x 20 or 131,072 x 10
131,072 x 20 or 262,144 x 10
262,144 x 20 or 524,288 x 10
FLAG
LOGIC
READ POINTER
FF/IR
PAF
EF/OR
PAE
FWFT
FSEL0
FSEL1
IW
OW
MRS
PRS
TCK
TRST
TMS
TDO
TDI
BUS
CONFIGURATION
RESET
LOGIC
JTAG CONTROL
(BOUNDARY SCAN)
OUTPUT REGISTER
READ
CONTROL
LOGIC
Vref
HSTL
HSTL I/0
CONTROL
OE
Q0 -Qn (x20, x10)
EREN
ERCLK
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The TeraSync is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
RT
MARK
RSDR
RCLK
REN
RCS
5996 drw01
DECEMBER 2003
DSC-5996/8
1 page IDT72T2098/108/118/128 2.5V HIGH-SPEED TeraSync™ DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATIONS
32K x 20/64K x 10, 64K x 20/128K x 10, 128K x 20/256K x 10, 256K x 20/512K x 10
PARTIAL RESET (PRS) MASTER RESET (MRS)
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
WRITE CLOCK (WCLK)
WRITE ENABLE (WEN)
WRITE CHIP SELECT (WCS)
WRITE SINGLE DATA RATE (WSDR)
(x20, x10) DATA IN (D0 - Dn)
SERIAL CLOCK (SCLK)
SERIAL ENABLE(SEN)
SERIAL READ ENABLE(SREN)
FIRST WORD FALL THROUGH (FWFT)
SERIAL INPUT (SI)
SERIAL OUTPUT (SO)
FULL FLAG/INPUT READY (FF/IR)
PROGRAMMABLE ALMOST-FULL (PAF)
IDT
72T2098
72T20108
72T20118
72T20128
READ CLOCK (RCLK)
READ ENABLE (REN)
OUTPUT ENABLE (OE)
READ CHIP SELECT (RCS)
READ SINGLE DATA RATE (RSDR)
(x20, x10) DATA OUT (Q0 - Qn)
RCLK ECHO (ERCLK)
REN ECHO (EREN)
MARK
RETRANSMIT (RT)
EMPTY FLAG/OUTPUT READY (EF/OR)
PROGRAMMABLE ALMOST-EMPTY (PAE)
INPUT WIDTH (IW) OUTPUT WIDTH (OW)
5996 drw03
Figure 1. Single Device Configuration Signal Flow Diagram
TABLE 1 — BUS-MATCHING CONFIGURATION MODES
I W OW Write Port Width
L L x20
L H x20
H L x10
H H x10
NOTE:
1. Pin status during Master Reset.
Read Port Width
x20
x10
x20
x10
TABLE 2 — DATA RATE-MATCHING CONFIGURATION MODES
WSDR
RSDR
Write Port Width
Read Port Width
HH
HL
LH
LL
NOTE:
1. Pin status during Master Reset.
2. Data Rate Matching can be used in conjunction with Bus-Matching modes.
Double Data Rate
Double Data Rate
Single Data Rate
Single Data Rate
Double Data Rate
Single Data Rate
Double Data Rate
Single Data Rate
5
5 Page IDT72T2098/108/118/128 2.5V HIGH-SPEED TeraSync™ DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATIONS
32K x 20/64K x 10, 64K x 20/128K x 10, 128K x 20/256K x 10, 256K x 20/512K x 10
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
HSTL
1.5V AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
0.25 to 1.25V
0.4ns
0.75
VDDQ/2
NOTE:
1. VDDQ = 1.5V±.
AC TEST LOADS
VDDQ/2
50Ω
I/O Z0 = 50Ω
5996 drw04
Figure 2a. AC Test Load
EXTENDED HSTL
1.8V AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
0.4 to 1.4V
0.4ns
0.9
VDDQ/2
NOTE:
1. VDDQ = 1.8V±.
2.5V LVTTL
2.5V AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
GND to 2.5V
1ns
VCC/2
VDDQ/2
NOTE:
1. For LVTTL VCC = VDDQ.
6
5
4
3
2
1
20 30 50 80 100
Capacitance (pF)
200
5996 drw04a
Figure 2b. Lumped Capacitive Load, Typical Derating
11
11 Page |
Páginas | Total 51 Páginas | |
PDF Descargar | [ Datasheet IDT72T20118.PDF ] |
Número de pieza | Descripción | Fabricantes |
IDT72T20118 | (IDT72T20xxx) DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION | Integrated Device Technology |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |