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PDF 56F8014 Data sheet ( Hoja de datos )
| Número de pieza | 56F8014 | |
| Descripción | 16-bit Digital Signal Controllers | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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56F8014
Data Sheet
Preliminary Technical Data
56F8000
16-bit Digital Signal Controllers
MC56F8014
Rev. 3
9/2005
freescale.com
1 page  
www.DataSheet4U.com
56F8014 Features
Part 1 Overview
1.1 56F8014 Features
1.1.1 Digital Signal Controller Core
• Efficient 16-bit 56800E family Digital Signal Controller (DSC) engine with dual Harvard architecture
• As many as 32 Million Instructions Per Second (MIPS) at 32MHz core frequency
• Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)
• Four 36-bit accumulators, including extension bits
• Arithmetic and logic multi-bit shifter
• Parallel instruction set with unique DSP addressing modes
• Hardware DO and REP loops
• Three internal address buses
• Four internal data buses
• Instruction set supports both DSP and controller functions
• Controller-style addressing modes and instructions for compact code
• Efficient C compiler and local variable support
• Software subroutine and interrupt stack with depth limited only by memory
• JTAG/EOnCE debug programming interface
1.1.2 Memory
• Harvard architecture permits as many as three simultaneous accesses to program and data memory
• Flash security and protection
• On-chip memory, including a low-cost, high-volume Flash solution
— 16KB of Program Flash
— 4KB of Unified Data/Program RAM
• EEPROM emulation capability
1.1.3 Peripheral Circuits for 56F8014
• One Pulse Width Modulator (PWM) module with five PWM outputs and three Fault inputs; fault-tolerant
design with dead time insertion; supports both center-aligned and edge-aligned modes
• One eight-input, 12-bit, Analog-to-Digital Converter (ADC), which support two simultaneous conversions
with dual, 4-pin multiplexed inputs; ADC and PWM modules can be synchronized through Timer Channels
2 and 3
• One 16-bit Quad Timer module (TMR) totaling four pins: Timer works in conjunction with the PWM and
ADC
• One Serial Communication Interface (SCI) with LIN Slave functionality
• One Serial Peripheral Interface (SPI)
• Computer Operating Properly (COP)/Watchdog timer
Freescale Semiconductor
Preliminary
56F8014 Technical Data, Rev. 3
5
5 Page 
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Product Documentation
1.5 Product Documentation
The documents listed in Table 1-2 are required for a complete description and proper design with the
56F8014. Documentation is available from local Freescale distributors, Freescale Semiconductor sales offices,
Freescale Literature Distribution Centers, or online at:
http://www.freescale.com
Table 1-2 56F8014 Chip Documentation
Topic
DSP56800E
Reference Manual
56F8000 Peripheral
Reference Manual
56F801x Serial
Bootloader User Guide
56F8014
Technical Data Sheet
56F8014
Errata
Description
Detailed description of the 56800E family architecture,
16-bit Digital Signal Controller core processor, and the
instruction set
Detailed description of peripherals of the 56F8000
family of devices
Detailed description of the Serial Bootloader in the
56F801x family of devices
Electrical and timing specifications, pin descriptions,
and package descriptions (this document)
Details any chip issues that might be present
Order Number
DSP56800ERM
MC56F8000RM
56F801xBLUG
MC56F8014
MC56F8014E
1.6 Data Sheet Conventions
This data sheet uses the following conventions:
OVERBAR
This is used to indicate a signal that is active when pulled low. For example, the RESET pin is
active when low.
“asserted”
A high true (active high) signal is high or a low true (active low) signal is low.
“deasserted” A high true (active high) signal is low or a low true (active low) signal is high.
Examples:
Signal/Symbol
Logic State
Signal State
Voltage1
PIN
True
Asserted
VIL/VOL
PIN
False
Deasserted
VIH/VOH
PIN
True
Asserted
VIH/VOH
PIN
False
Deasserted
1. Values for VIL, VOL, VIH, and VOH are defined by individual product specifications.
VIL/VOL
Freescale Semiconductor
Preliminary
56F8014 Technical Data, Rev. 3
11
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet 56F8014.PDF ] | |
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