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PDF NE56604-42 Data sheet ( Hoja de datos )
| Número de pieza | NE56604-42 | |
| Descripción | System reset | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
NE56604-42
System reset with built-in Watchdog timer
Product data
Supersedes data of 2001 Aug 22
2003 Oct 15
Philips
Semiconductors
1 page  
www.DataSheet4U.com
Philips Semiconductors
System reset with built-in Watchdog timer
Product data
NE56604-42
AC ELECTRICAL CHARACTERISTICS
Characteristics measured with VCC = 5.0 V, and Tamb = 25 °C, unless otherwise specified.
See Figure 27 (Test circuit 2) for test configuration used for AC parameters.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
tP1
Minimum power supply pulse width for
4.0 V ≤ negative-going VCC pulse ≤ 5.0 V
8.0
–
– µs
detection
tCLKW
Clock input pulse width
3.0 –
– µs
tCLK Clock input cycle
20 –
– µs
tWDM
Watchdog monitoring time (Notes 1, 6)
CT = 0.1 µF; RCT = open
50 100 150 ms
tWDR
Watchdog reset time (Notes 2, 6)
CT = 0.1 µF
1.0 2.0 3.0 ms
tPR Power-on reset delay time (Notes 3, 6)
VCC = rising from 0 V; CT = 0.1 µF
50 100 150 ms
tPD1 Reset propagation delay time (Note 4)
RESET: RL1 = 2.2 kΩ; CL1 = 100 pF
– 2.0 10 µs
tPD2
RESET: RL2 = 10 kΩ; CL2 = 20 pF
– 3.0 10 µs
tR1 Reset rise time (Note 5)
RESET: RL1 = 2.2 kΩ; CL1 = 100 pF
– 1.0 1.5 µs
tR2
RESET: RL2 = 10 kΩ; CL2 = 20 pF
– 1.0 1.5 µs
tF1 Reset fall time (Note 5)
RESET: RL1 = 2.2 kΩ; CL1 = 100 pF
– 0.1 0.5 µs
tF2
RESET: RL2 = 10 kΩ; CL2 = 20 pF
– 0.5 1.0 µs
NOTES:
1. ‘Watchdog monitoring time’ is the duration from the last pulse (negative-going edge) of the timer clear clock pulse until reset output pulse
occurs (see Figure 20). A reset signal is output if a clock pulse is not input during this time. Watchdog monitoring time can be modified by
changing the value of the RCT pull-up resistor. Monitoring time adjustments are shown in Figure 25.
2. ‘Watchdog reset time’ is the reset pulse width (see Figure 20).
3. ‘Power-on reset delay time’ is the duration measured from the time VCC exceeds the upper detection threshold (VSH) and power-on reset
release is experienced (RESET output HIGH; RESET output LOW).
4. ‘Reset response time’ is the duration from when the supply voltage sags below the lower detection threshold (VSL) and reset occurs (RESET
output LOW, RESET output HIGH).
5. Reset rise and fall times are measured at 10% and 90% output levels.
6. Watchdog monitoring time (tWDM), Watchdog reset time (tWDR), and power-on reset delay time (tPR) during power-on can be modified by
varying the CT capacitance. The times can be approximated by applying the following formula. The recommended range for CT is 0.001 µF
to 10 µF.
Formula 1.
Calculation for approximate tPR, tWDM, and tWDR values:
tPR (ms) ≈ 1000 × CT (µF)
tWDM (ms) ≈ 1000 × CT (µF)
tWDR (ms) ≈ 20 × CT (µF)
Example:
When CT = 0.1 µF and RCT = open:
tPR ≈ 100 ms
tWDM ≈ 100 ms
tWDR ≈ 2.0 ms
2003 Oct 15
5
5 Page 
www.DataSheet4U.com
Philips Semiconductors
System reset with built-in Watchdog timer
Product data
NE56604-42
Application information
The Watchdog timer’s external component values are critical to its
performance.
The detection threshold voltage can be adjusted by externally
influencing the internal divider reference voltage. Figures 21 and 23
show a method to lower and raise the threshold voltage. Figures 22
and 24 show the influence of the pull-down and pull-up resistors on
the threshold voltage. The use of a capacitor (1000 pF or larger)
from Pin 7 to ground is recommended to filter out noise from being
imposed on the threshold voltages.
VCC
1
2
3
CT
4
R1
8
7
6
5
1000 pF
LOGIC SYSTEM
RESET
CLK
RESET
GND
SL01327
Figure 21. Circuit to lower detection threshold.
VCC
1
2
3
CT
4
8
7
6
5
1000 pF
LOGIC SYSTEM
RESET
CLK
RESET
GND
R2
SL01328
Figure 23. Circuit to raise detection threshold.
The Reset Detection Threshold can be decreased by connecting an
external resistor R1 from Pin 7 to VCC, as shown in Figure 21. See
Figure 22 to determine the approximate value of R1 to use.
The Reset Detection Threshold can be increased by connecting an
external resistor R2 from Pin 7 to ground, as shown in Figure 23.
See Figure 24 to determine the approximate value of R2 to use.
5.0
VCC = 5.0 V
Tamb = 25 °C
4.0
3.5
VSH
VSL
3.0
0
100 200 300 400 500 600
R1, EXTERNAL PIN 7 TO VCC RESISTOR (kΩ)
700
SL01326
Figure 22. Reset detection threshold vs. external R1.
5.1
5.0
VCC = 5.0 V
Tamb = 25 °C
4.9
4.8
4.7
4.6
VSH
4.5
VSL
4.4
4.3
0
100 200 300 400 500 600
R2, EXTERNAL PIN 7 TO GROUND RESISTOR (kΩ)
700
SL01325
Figure 24. Reset detection threshold vs. external R2.
2003 Oct 15
11
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