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PDF AD7294 Data sheet ( Hoja de datos )
| Número de pieza | AD7294 | |
| Descripción | DAC/ADC Temperature Sensor and Current Sense | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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12-Bit, Multichannel, DAC/ADC Temperature Sensor and
Current Sense for Monitor and Control Applications
Preliminary Technical Data
AD7294
FEATURES
GENERAL DESCRIPTION
4-channel 12-bit DAC
Guaranteed monotonic
10 μs settling time
10 mA sink and source capability
Offset in for range adjustment
The AD7294 contains all the functions required for general-
purpose monitoring and control of current, voltage, and
temperature integrated into a single-chip solution. The part
includes low voltage (±200 mV) analog-input sense amplifiers
Output span: 5 V in 0 to 15 V range
9-channel, 12-bit ADC
200 kSPS throughput
Input range: 0 to VREF, 0 to 2 VREF
Differential/single-ended
Limit registers per channel
for current monitoring across shunt resistors, temperature-sense
inputs, and four uncommitted analog input channels multiplexed
into a 200 kSPS SAR ADC. An internal low ppm reference is
provided to drive both the DAC and ADC. Four 12-bit DACs
provide the outputs for voltage control. The AD7294 also includes
2 high-side current sense
limit registers for alarm functions. The part is designed on a high
48 V max operation
±1% FS accuracy
±200 mV input range
voltage DMOS process for a high voltage compliance, 48 V on
the current-sense inputs, and up to 15 V DAC output voltage.
3-channel temperature sensor
Diode temperature measurement
±2°C accuracy
Measurement range: −10°C to +90°C
The part is ideal for bias current control of the power transistors
used in power amplifiers employed in CDMA, GSM, EDGE, and
UMTS cellular base stations.
Internal 2.5 V reference
I2C®-compatible serial interface
Temperature range: −40°C to +105°C
The DACs provide digital control with 1.2 mV resolution to
control the bias currents of the power transistors. They can also
Alert function
be used to provide control voltages for variable gain amplifiers
Package type: LFCSP-56, TQFP-64
or impedance match networks in the main signal chain. Thermal
APPLICATIONS
diode based temperature sensors are incorporated to compensate
for temperature effects. The ADC monitors the high-side current
Cellular base station (GSM, EDGE, UMTS, CDMA)
Point-to-multipoint and other RF transmission systems
12 V, 24 V, 48 V automotive applications
Industrial control
and temperature. All this functionality is provided in a 56-lead
LFCSP package and a 64-lead TQFP package operating over a
temperature range of −40°C to +105°C.
FUNCTIONAL BLOCK DIAGRAM
R Sense
VPP(1-2)
RS1(+) RS1(-)
RS2(+) RS2(-)
REFOUT/
REFOUT/
REFIN ADC REFIN DAC AVDD(1-5) AGND(1-9) V+(1-2)
RF CHOKE
ISENSE2
OVER-RANGE
ISENSE1
OVER-RANGE
VIN 0
VIN 1
VIN 2
VIN 3
D1 (+)
HIGH SIDE
CURRENT
SENSE
SET-POINT
240mV
HIGH SIDE
CURRENT
SENSE
MUX
2.5V
REF
12-BIT
ADC
12-BIT
DAC
100K
100K 200K
200K
12-BIT
DAC
100K
100K 200K
200K
VOUT A
FILTER
OFFSET IN A
VOUT B
FILTER
RF OUT
LDMOS
LDMOS
D0 (+)
T1 T0
D0 (-)
D1 (-)
AD7294
LIMIT
REGISTERS
TEMP
SENSOR
CONTROL
LOGIC
I2C INTERFACE
PROTOCOL
12-BIT
DAC
100K
100K 200K
200K
12-BIT
DAC
100K
100K 200K
200K
OFFSET IN B
VOUT C GAIN
CONTROL
OFFSET IN C
VOUT D
IMPEDANCE
MATCH
OFFSET IN D
DVDD DGND(1-2) SDA SCL A2 A1 A0 CAP ALERT
Figure 1. Typical Configuration for AD7294 in Cellular Base Station RF LDMOS Power Amplifier Control
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
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Preliminary Technical Data
AD7294
GENERAL SPECIFICATIONS1
AVDD = DVDD 4.5 V to 5.5 V, AGND = DGND= 0 V, external 2.5 V reference. Temperature range for B version: −40°C to +105°C. All
specifications TMIN to TMAX, unless otherwise noted.
Parameter
LOGIC INPUTS (SDA, SCL ONLY)
VIH, Input High Voltage
VIL, Input Low Voltage
IIN, Input Leakage Current
VHYST, Input Hysteresis
CIN, Input Capacitance
Glitch Rejection
LOGIC OUTPUTS
(SDA, ALERT, FAULT)
VOL, Output Low Voltage
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
VPP
AVDD
V(+)
DVDD
VDRIVE
IPP
AIDD
DIDD
AIDD (Power-Down)
DIDD (Power-Down)
Power Dissipation
Min Typ
0.7 VDRIVE
0.05 DVDD
8
AVDD
4.5
4.5
4.5
3
TBD
TBD
8
Max
0.3 VDRIVE
±1
50
0.4
0.6
±1
48
5.5
16.5
5.5
5.5
1
5
5
TBD
Unit
V
V
µA
V
pF
ns
V
V
µA
pF
V
V
V
V
V
mA
mA
µA
µA
mW
Test Conditions / Comments
Input filtering suppresses noise
spikes of less than 50 ns
ISINK = 3 mA
ISINK = 6 mA
Outputs unloaded
VIH = DVDD, VIL = DGND
1 Guaranteed by design and characterization; not subject to production testing.
Rev. PrB | Page 5 of 45
5 Page 
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Preliminary Technical Data
AD7294
SYSTEM DESCRIPTION
R Sense
VPP(1-2)
RS1(+) RS1(-)
RS2(+) RS2(-)
REFOUT/
REFOUT/
REFIN ADC REFIN DAC AVDD(1-5) AGND(1-9) V+(1-2)
RF CHOKE
FAULT2
FAULT1
VIN 0
VIN 1
VIN 2
VIN 3
D1 (+)
HIGH SIDE
CURRENT
SENSE
SET-POINT
240mV
HIGH SIDE
CURRENT
SENSE
MUX
2.5V
REF
12-BIT
ADC
12-BIT
DAC
100K
100K 200K
200K
12-BIT
DAC
100K
100K 200K
200K
VOUT A
FILTER
OFFSET IN A
VOUT B
FILTER
RF OUT
LDMOS
LDMOS
D0 (+)
T1 T0
D0 (-)
D1 (-)
AD7294
LIMIT
REGISTERS
TEMP
SENSOR
CONTROL
LOGIC
I2C INTERFACE
PROTOCOL
12-BIT
DAC
100K
100K 200K
200K
12-BIT
DAC
100K
100K 200K
200K
OFFSET IN B
VOUT C GAIN
CONTROL
OFFSET IN C
VOUT D
IMPEDANCE
MATCH
OFFSET IN D
DVDD DGND(1-2) SDA SCL A2 A1 A0 CAP ALERT
Figure 5. System Diagram
The AD7294 contains all the functions required for general-
purpose monitoring and control of current, voltage, and
temperature integrated into a single-chip solution. The part
includes low voltage (±200 mV) analog-input sense amplifiers
for current monitoring across shunt resistors, temperature-
sense inputs, and four uncommitted analog input channels
multiplexed into a 200 kSPS SAR ADC. Four 12-bit DACs
provide the outputs for voltage control and complete the
analog-to-digital digital-to-analog control loop. The DACs
provide digital control with 1.2 mV resolution to control the
bias currents of the power transistors; they can also be used to
provide control voltages for variable gain amplifiers or
impedance-match networks in the main signal chain.
The ADC monitors the high-side current and temperature
sensors as shown in Figure 6. If the temperature of, for
example, an LDMOS High Power Amplifier (HPA) transistor
rises above predetermined limits, out of limit comparisons
generate flags. The on-chip DAC will use the digital correction
loop to decrease the VGS of the device to maintain the desired
output voltage. An external resistor is used to sense the
transistors drain current and so automatically control the gate
bias voltage of the device.
VDD
RSENSE
CURRENT
SENSE
ADC
An internal, 2.5 V, low ppm reference is provided to drive both
the DAC and ADC. This internal reference can be overdriven
when an external reference is required. The AD7294 also
includes limit registers for alarm functions. Using alert registers,
the AD7294 flags an alert signal when the ADC readings go
above or below predetermined values. The analog input range
for the ADC can be selected to be a 0 V to VREF or 0 V to a
2×VREF input, configured with either single-ended or
differential analog inputs.
To compensate for temperature effects, one local on-chip, band
gap, temperature sensor and two remote, diode based,
temperature sensors can alternatively be selected. The high side
current sense is specified to manage LDMOS FETs up to 48 V
with bias currents ranging from 300 mA to 800 mA and gate
voltages of 4 V to 9 V. The part is designed on a high voltage
DMOS process for high voltage compliance, 60 V on the
current-sense inputs, and up to 15 V DAC output voltage.
RF CHOKE
DAC
VDRIVE
TEMP
SENSE
VOUTPUT
HPA
Figure 6. Simplified Diagram of System
The part is ideal for bias current control of the power transistors
in power amplifiers employed in CDMA, GSM, EDGE, and UMTS
cellular base stations. The I2C digital interface allows the
flexibility of programming the bias points using an external
controller. The I2C bus also allows a number of devices to be
connected in parallel to control multiple FETS, the standard in
single-carrier and multi-carrier base station systems.
Rev. PrB | Page 11 of 45
11 Page | ||
| Páginas | Total 45 Páginas | |
| PDF Descargar | [ Datasheet AD7294.PDF ] | |
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