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PDF EM78P911A Data sheet ( Hoja de datos )

Número de pieza EM78P911A
Descripción 8-BIT MICRO-CONTROLLER
Fabricantes ELAN Microelectronics 
Logotipo ELAN Microelectronics Logotipo



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EM78P911A
8-BIT MICRO-CONTROLLER
Version 2.0
ELAN MICROELECTRONICS CORP.
No. 12, Innovation 1st RD., Science-Based Industrial Park
Hsin Chu City, Taiwan, R.O.C.
TEL: (03) 5639977
FAX: (03)5630118

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EM78P911A pdf
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V.Functional Block Diagram
EM78P911A
8-bit Micro-controller
CCPUP
U
TTIMIMININGG
CCOONNTTRROOLL
TITMIEMRE
R
RROOM
M
RRAAM
M
DDRLRILCVICDVEDERR
IOIO
PPOORRTT
FSK
DTMF
CALL WAITING
SDT
MEI&RTF
LCD
I/O
Fig.2 Block diagram1
Xin Xout
Oscillator
timing control
WDT timer
prescalar
R1(TCC)
Control sleep
and wake-up
on I/O port
GENERAL
RAM
R4
Interruption
control
ROM
Instruction
register
Instruction
decoder
R2 STACK
ALU
R3
ACC
R5
DATA & CONTROL BUS
2.5 k RAM
FSK
DTMF
CALL WAITING
SDT
MEI&RTF
PORT5
IOC5 R5
PORT6
IOC6 R6
PORT7
IOC7 R7
PORT8
IOC8 R8
PORT9
IOC9 R9
P54~P57
P60~P67
P70~P77
P80~P87
P90~P97
Fig.3 Block diagram2
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
08/16/2002 (V2.0)

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EM78P911A arduino
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EM78P911A
8-bit Micro-controller
* Bit7 IDLE: sleep mode selection bit
0/1=sleep mode/IDLE mode. This bit will decide SLEP instruction which mode to go.
These two modes can be waken up by TCC clock or Watch Dog or PORT9 and run from “SLEP” next instruction.
Wakeup signal SLEEP mode IDLE mode
GREEN mode NORMAL mode
RA(7,6)=(0,0) RA(7,6)=(1,0)
RA(7,6)=(x,0) RA(7,6)=(x,1)
+ SLEP
+ SLEP
no SLEP
no SLEP
TCC time out X
Wake-up
Interrupt
Interrupt
+ Interrupt
+ Next instruction
WDT time out RESET
Wake-up
RESET
RESET
+ Next instruction
Port9
RESET
Wake-up
X
X
/RINGTIME pin
+ Next instruction
PORT70~73
X
Wake-up
Interrupt
Interrupt
+ Interrupt
+ Next instruction
*P70 ~ P73 's wakeup function is controlled by IOCF(1,2,3) and ENI instruction.
*P70 's wakeup signal is a rising or falling signal defined by CONT REGISTER bit7.
*/RINGTIME pin , Port9 ,Port71,Port72 and Port73 's wakeup signal is a falling edge signal.
8. RB(DTMF tone row and column register) (read/write)
76
5
4
3
21
c7 c6
c5
c4
r3
r2 r1
* Bit 0 - Bit 3 are row-frequency tone.
* Bit 4 - Bit 7 are column-frequency tone.
* Initial RB is equal to high. Bit 7 ~ 0 are all "1" , turn off DTMF power .
0
r0
bit 3~0
1110
1101
1011
0111
Column freq
bit 7~4
Row freq
699.2Hz
771.6Hz
854Hz
940.1Hz
1
4
7
*
1203Hz
1110
2
5
8
0
1331.8Hz
1101
3
6
9
#
1472Hz
1011
A
B
C
D
1645.2Hz
0111
9. RC(CALLER ID address)(read/write)
765432
CIDA7 CIDA6 CIDA5 CIDA4 CIDA3 CIDA2
* Bit 0 ~ Bit 7 select CALLER ID RAM address up to 256.
1
CIDA1
0
CIDA0
10. RD(CALLER ID RAM data)(read/write)
* Bit 0 ~ Bit 8 are CALLER ID RAM data transfer register.
User can see IOCA register how to select CID RAM banks.
11. RE(LCD Driver,WDT Control)(read/write)
7 6 5 4 3 2 10
CWPWR /WDTE /WUP9H /WUP9L /WURING LCD_C2 LCD_C1 LCD_M
* Bit0 (LCD_M):LCD_M decides the methods, including duty, bias, and frame frequency.
* Bit1~Bit2 (LCD_C#):LCD_C# decides the LCD display enable or blanking. change the display duty must set the
"LCD_C2,LCD_C1" to "00".
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
08/16/2002 (V2.0)

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