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PDF ICS952011 Data sheet ( Hoja de datos )
| Número de pieza | ICS952011 | |
| Descripción | Programmable Timing Control Hub | |
| Fabricantes | Integrated Circuit Systems | |
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Integrated
Circuit
Systems, Inc.
ICS952011
Programmable Timing Control Hub™ for P4™ processor
Recommended Application:
SIS 645/645DX/648/650 style chipsets.
Output Features:
• 2 - Pairs of differential CPUCLKs (differential current mode)
• 1 - SDRAM @ 3.3V
• 9 - PCI @3.3V (including 2 free-running)
• 2 - AGP @ 3.3V
• 2 - ZCLKs @ 3.3V
• 1- 12/48MHZ @ 3.3V
• 1- 24/48MHz, @3.3V selectable by I2C
• 3- REF @3.3V, 14.318MHz.
Key Specifications:
• PCI - PCI output skew: < 500ps
• CPU - SDRAM output skew: < 1ns
• AGP - AGP output skew: <150ps
Features/Benefits:
• Selectable asynchronous/synchronous AGP, ZCLK and
PCI outputs
• Supports DDR333 OEM frequencies
• Programmable output frequency, divider ratios, output
rise/falltime, output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system
if system malfunctions.
• Programmable watch dog safe frequency.
• Support I2C Index read/write and block read/write
operations.
• For PC133 SDRAM system use the ICS9179-16 as the
memory buffer.
• For DDR SDRAM system use the ICS93735 or
ICS93732 as the memory buffer.
• Uses external 14.318MHz crystal.
Functionality
Bit2 Bit7 Bit6 Bit5 Bit4 CPU SDR
FS4 FS3 FS2 FS1 FS0 MHz MHz
0 0 0 0 0 100.20 100.20
0 0 0 0 1 100.20 133.60
0 0 0 1 0 100.20 200.40
0 0 0 1 1 100.20 167.00
0 0 1 0 0 133.60 100.20
0 0 1 0 1 133.60 133.60
0 0 1 1 0 133.60 200.40
0 0 1 1 1 133.60 167.00
0 1 0 0 0 200.05 100.03
0 1 0 0 1 200.05 133.37
0 1 0 1 0 200.05 200.05
0 1 0 1 1 200.05 160.04
0 1 1 0 0 166.70 100.20
0 1 1 0 1 166.70 133.36
0 1 1 1 0 160.04 200.05
0 1 1 1 1 166.70 166.70
1 0 0 0 0 100.20 100.20
1 0 0 0 1 100.20 133.60
1 0 0 1 0 100.20 200.40
1 0 0 1 1 100.20 167.00
1 0 1 0 0 133.60 100.20
1 0 1 0 1 133.60 133.60
1 0 1 1 0 133.60 200.40
1 0 1 1 1 133.60 167.00
1 1 0 0 0 200.05 100.03
1 1 0 0 1 200.05 133.37
1 1 0 1 0 200.05 200.05
1 1 0 1 1 200.05 160.04
1 1 1 0 0 166.70 100.20
1 1 1 0 1 166.70 133.36
1 1 1 1 0 160.04 200.05
1 1 1 1 1 166.70 166.70
AGP
MHz
66.80
66.80
66.80
66.80
66.80
66.80
66.80
66.80
66.68
66.68
66.68
66.68
66.68
66.80
66.68
66.68
66.80
66.80
66.80
66.80
66.80
66.80
66.80
66.80
66.68
66.68
66.68
66.68
66.68
66.80
66.68
66.68
PCI
MHz
33.40
33.40
33.40
33.40
33.40
33.40
33.40
33.40
33.34
33.34
33.34
33.34
33.40
33.40
33.34
33.34
33.40
33.40
33.40
33.40
33.40
33.40
33.40
33.40
33.34
33.34
33.34
33.34
33.40
33.40
33.34
33.34
ZCLK
MHz
66.80
66.80
66.80
66.80
66.80
66.80
66.80
66.80
66.68
66.68
66.68
66.68
66.68
66.80
66.68
66.68
133.60
133.60
133.60
133.60
133.60
133.60
133.60
133.60
133.37
133.37
133.37
133.37
133.60
133.60
133.37
133.37
Pin Configuration
VDDREF 1
**FS0/REF0 2
**FS1/REF1 3
**FS2/REF2 4
GNDREF 5
X1 6
X2 7
GNDZ 8
ZCLK0 9
ZCLK1 10
VDDZ 11
*(PCI_STOP#)PCICLK6 12
VDDPCI 13
**FS3/PCICLK_F0 14
**FS4/PCICLK_F1 15
*MODE0/PCICLK0 16
PCICLK1 17
GNDPCI 18
VDDPCI 19
PCICLK2 20
PCICLK3 21
PCICLK4 22
PCICLK5 23
GNDPCI 24
48 VDDSDR
47 SDRAM_OUT
46 GND
45 CPU_STOP#(PD#)*
44 CPUCLKT1
43 CPUCLKC1
42 VDDCPU
41 GNDCPU
40 CPUCLKT0
39 CPUCLKC0
38 IREF
37 GND
36 VDDA
35 SCLK
34 SDATA
33 Vtt_PwrGd/PD#(CPUSTOP#)*
32 GNDAGP
31 AGPCLK0
30 AGPCLK1
29 VDDAGP
28 VDD48
27 12_48MHz/SEL12_48#**
26 24_48MHz/SEL24_48#*~
25 GND48
48-SSOP
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
~ This output has 1.5X drive strength
0721A—07/29/03
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Integrated
Circuit
Systems, Inc.
ICS952011
General I2C serial interface information for the ICS952011
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2 (H)
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
Byte N + X -1
(see Note 2)
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2 (H)
• ICS clock will acknowledge
• Controller (host) sends the begining byte
location = N
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3 (H)
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X(H)
was written to byte 8).
• Controller (host) will need to acknowledge each
byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
Index Block Write Operation
Controller (Host)
T starT bit
ICS (Slave/Receiver)
Slave Address D2(H)
WR WRite
ACK
Beginning Byte = N
ACK
Data Byte Count = X
ACK
Beginning Byte N
ACK
Byte N + X - 1
P stoP bit
ACK
Index Block Read Operation
Controller (Host)
ICS (Slave/Receiver)
T starT bit
Slave Address D2(H)
WR WRite
ACK
Beginning Byte = N
ACK
RT Repeat starT
Slave Address D3(H)
RD ReaD
ACK
ACK
ACK
Data Byte Count = X
Beginning Byte N
N Not acknowledge
P stoP bit
Byte N + X - 1
0721A—07/29/03
DataSheet4 U .com
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Integrated
Circuit
Systems, Inc.
Byte1 (7:0)
Hex
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
48
49
4A
4B
VCO Freq
360.34
361.53
362.73
363.92
365.11
366.31
367.50
368.69
369.89
371.08
372.27
373.47
374.66
375.85
377.05
378.24
379.43
380.62
381.82
383.01
384.20
385.40
386.59
387.78
388.98
390.17
391.36
392.56
393.75
394.94
396.14
397.33
398.52
399.72
400.91
402.10
403.30
404.49
AGP Freq
60.06
60.26
60.45
60.65
60.85
61.05
61.25
61.45
61.65
61.85
62.05
62.24
62.44
62.64
62.84
63.04
63.24
63.44
63.64
63.84
64.03
64.23
64.43
64.63
64.83
65.03
65.23
65.43
65.62
65.82
66.02
66.22
66.42
66.62
66.82
67.02
67.22
67.41
PCI Freq
30.03
30.13
30.23
30.33
30.43
30.53
30.62
30.72
30.82
30.92
31.02
31.12
31.22
31.32
31.42
31.52
31.62
31.72
31.82
31.92
32.02
32.12
32.22
32.32
32.41
32.51
32.61
32.71
32.81
32.91
33.01
33.11
33.21
33.31
33.41
33.51
33.61
33.71
ICS952011
Byte1 (7:0)
Hex
4C
4D
4E
4F
50
51
52
53
54
55
56
57
58
59
5A
5B
5C
5D
5E
5F
60
61
62
63
64
65
66
67
68
69
6A
6B
6C
6D
6E
6F
70
71
VCO Freq
405.68
406.87
408.07
409.26
410.45
411.65
412.84
414.03
415.23
416.42
417.61
418.81
420.00
421.19
422.39
423.58
424.77
425.97
427.16
428.35
429.55
430.74
431.93
433.12
434.32
435.51
436.70
437.90
439.09
440.28
441.48
442.67
443.86
445.06
446.25
447.44
448.64
449.83
AGP Freq
67.61
67.81
68.01
68.21
68.41
68.61
68.81
69.01
69.20
69.40
69.60
69.80
70.00
70.20
70.40
70.60
70.80
70.99
71.19
71.39
71.59
71.79
71.99
72.19
72.39
72.59
72.78
72.98
73.18
73.38
73.58
73.78
73.98
74.18
74.37
74.57
74.77
74.97
PCI Freq
33.81
33.91
34.01
34.11
34.20
34.30
34.40
34.50
34.60
34.70
34.80
34.90
35.00
35.10
35.20
35.30
35.40
35.50
35.60
35.70
35.80
35.89
35.99
36.09
36.19
36.29
36.39
36.49
36.59
36.69
36.79
36.89
36.99
37.09
37.19
37.29
37.39
37.49
0721A—07/29/03
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| PDF Descargar | [ Datasheet ICS952011.PDF ] | |
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