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PDF MAX1032 Data sheet ( Hoja de datos )
| Número de pieza | MAX1032 | |
| Descripción | (MAX1032 / MAX1033) Serial 14-Bit ADCs | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-3573; Rev 1; 8/06
8-/4-Channel, ±12V Multirange Inputs,
Serial 14-Bit ADCs
General Description
The MAX1032/MAX1033 multirange, low-power, 14-bit,
successive-approximation, analog-to-digital converters
(ADCs) operate from a single +5V supply and achieve
throughput rates up to 115ksps. A separate digital sup-
ply allows digital interfacing with 2.7V to 5.25V systems
using the SPI™-/QSPI™-/MICROWIRE™-compatible
serial interface. Partial power-down mode reduces the
supply current to 1.3mA (typ). Full power-down mode
reduces the power-supply current to 1µA (typ).
The MAX1032 provides eight (single-ended) or four
(true differential) analog input channels. The MAX1033
provides four (single-ended) or two (true differential)
analog input channels. Each analog input channel is
independently software programmable for seven sin-
gle-ended input ranges (0 to +6V, -6V to 0, 0 to +12V,
-12V to 0, ±3V, ±6V, and ±12V), and three differential
input ranges (±6V, ±12V, ±24V).
An on-chip +4.096V reference offers a small convenient
ADC solution. The MAX1032/MAX1033 also accept an
external reference voltage between 3.800V and 4.136V.
The MAX1032 is available in a 24-pin TSSOP package
and the MAX1033 is available in a 20-pin TSSOP pack-
age. Each device is specified for operation from -40°C
to +85°C.
Applications
Industrial Control Systems
Data-Acquisition Systems
Avionics
Robotics
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Features
♦ Software-Programmable Input Range for Each
Channel
♦ Single-Ended Input Ranges
0 to +6V, -6V to 0, 0 to +12V, -12V to 0, ±3V,
±6V, and ±12V
♦ Differential Input Ranges
±6V, ±12V, and ±24V
♦ Eight Single-Ended or Four Differential Analog
Inputs (MAX1032)
♦ Four Single-Ended or Two Differential Analog
Inputs (MAX1033)
♦ ±16.5V Overvoltage Tolerant Inputs
♦ Internal or External Reference
♦ 115ksps Maximum Sample Rate
♦ Single +5V Power Supply
♦ 20-/24-Pin TSSOP Package
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
CHANNELS
MAX1032EUG* -40°C to +85°C 24 TSSOP
8
MAX1033EUP -40°C to +85°C 20 TSSOP
*Future product—contact factory for availability.
4
Pin Configurations
TOP VIEW
AVDD1 1
CH0 2
CH1 3
CH2 4
CH3 5
CH4 6
CH5 7
CH6 8
CH7 9
CS 10
DIN 11
SSTRB 12
MAX1032
24 AGND1
23 AGND2
22 AVDD2
21 AGND3
20 REF
19 REFCAP
18 DVDD
17 DVDDO
16 DGND
15 DGNDO
14 DOUT
13 SCLK
TSSOP
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
DataSheet4 U .com
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8-/4-Channel, ±12V Multirange Inputs,
Serial 14-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(AVDD1 = AVDD2 = DVDD = DVDDO = 5V, AGND1 = DGND = DGNDO = AGND2 = AGND3 = 0, fCLK = 3.5MHz (50% duty cycle),
external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range
(±12V), CDOUT = 50pF, CSSTRB = 50pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Preamplifier Supply Voltage
AVDD2
4.75 5.25 V
Digital I/O Supply Voltage
DVDDO
2.70 5.25 V
AVDD1 Supply Current
IAVDD1
External clock mode,
external acquisition
mode, or internal
clock mode
Internal reference
External reference
3 3.5
mA
2.5 3
DVDD Supply Current
IDVDD
External clock mode, external acquisition
mode, or internal clock mode
AVDD2 Supply Current
IAVDD2
External clock mode, external acquisition
mode, or internal clock mode
DVDDO Supply Current
IDVDDO
External clock mode, external acquisition
mode, or internal clock mode
Total Supply Current
Partial power-down mode
Full power-down mode
Power-Supply Rejection Ratio
PSRR All analog input ranges
TIMING CHARACTERISTICS (Figures 15 and 16)
External clock mode
SCLK Period
tCP External acquisition mode
Internal clock mode
External clock mode
SCLK High Pulse Width (Note 5)
tCH External acquisition mode
Internal clock mode
External clock mode
SCLK Low Pulse Width (Note 5)
tCL External acquisition mode
Internal clock mode
DIN to SCLK Setup
tDS
DIN to SCLK Hold
SCLK Fall to DOUT Valid
CS Fall to DOUT Enable
CS Rise to DOUT Disable
CS Fall to SCLK Rise Setup
CS High Minimum Pulse Width
SCLK Fall to CS Rise Hold
SSTRB Rise to CS Fall Setup
tDH
tDO
tDV
tTR
tCSS
tCSPW
tCSH
DOUT Rise/Fall Time
CL = 50pF
SSTRB Rise/Fall Time
CL = 50pF
0.9 2
17.5 25
0.2
1.3
1
±0.125
1
272
228
100
109
92
40
109
92
40
40
0
40
40
0
40
10
10
62
62
83
40
40
40
mA
mA
mA
mA
µA
LSB
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
_______________________________________________________________________________________ 5
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5 Page 
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8-/4-Channel, ±12V Multirange Inputs,
Serial 14-Bit ADCs
Typical Operating Characteristics (continued)
(AVDD1 = AVDD2 = DVDD = DVDDO = 5V, AGND1 = DGND = DGNDO = AGND2 = AGND3 = 0, fCLK = 3.5MHz (50% duty cycle),
external clock mode, VREF = 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input range
(±12V), CDOUT = 50pF, CSSTRB = 50pF; unless otherwise noted.)
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
1
FULL-POWER BANDWIDTH
10 100 1000
FREQUENCY (kHz)
10,000
REFERENCE VOLTAGE vs. TIME
MAX1032/33 toc27
4ms/div
1V/div
0V
70,000
60,000
NOISE HISTOGRAM
(CODE CENTER)
65,534 SAMPLES
50,000
40,000
30,000
20,000
10,000
0
8191 8193 8195 8197
8192 8194
8196
CODE
35,000
30,000
NOISE HISTOGRAM
(CODE EDGE)
65,534
SAMPLES
25,000
20,000
15,000
10,000
5000
0
8192 8193 8194 8195 8196 8197
CODE
______________________________________________________________________________________ 11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX1032.PDF ] | |
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