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PDF DS1851 Data sheet ( Hoja de datos )
| Número de pieza | DS1851 | |
| Descripción | Dual Temperature-Controlled NV Digital-to-Analog Converters | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DS1851 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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DS1851
Dual Temperature-Controlled NV
Digital-to-Analog Converters
FEATURES
§ Two temperature-controlled 8-bit Digital-to-
Analog Converters (DACs)
§ DAC settings changeable every 4°C
§ Access to temperature data and device
control through a 2-wire interface
§ Operates with +3.3V or +5V supplies
§ Packaging: 8-pin TSSOP
§ Operating temperature: -40ºC to +95ºC
§ Programming temperature: 0ºC to +70ºC
ORDERING INFORMATION
DS1851E-010
8-pin 173mil TSSOP
DS1851E-010/T&R 8-pin Tape and Reel
TSSOP
PIN ASSIGNMENTS
SDA
SCL
Vrg
GND
1
2
3
4
8
7
6
5
VCC
Vrc
OutV
OutG
8-Pin TSSOP (173mil)
PIN DESCRIPTIONS
VCC - +3.3V or +5V Power Supply
Input
GND
- Ground
SDA
- 2-Wire Serial Data
Input/Output
SCL - 2-Wire Serial Clock Input
OutG
- DAC Output with Respect to
Ground
Vrg
OutV
- Reference Input from Ground
- DAC Output with Respect to
VCC
Vrc - Reference Input from VCC
DESCRIPTION
The DS1851 dual temperature-controlled nonvolatile (NV) DACs consists of two DACs, two EEPROM
look-up tables, and a direct-to-digital temperature sensor. Both of the DACs can be programmed with any
temperature coefficient, which means that any system temperature effects can be corrected without any
additional external devices. The DS1851 provides an ideal method for setting and temperature-
compensating bias voltages and currents in control applications using a minimal amount of external
circuitry.
The user-defined settings for both DACs are stored in two EEPROM look-up tables and can be accessed
over the industry-standard 2-wire serial bus, which consists of SDA and SCL pins. These look-up tables
can assign a unique output value to each DAC for every 4°C increment over the -40°C to +95°C range.
The output of the digital temperature sensor is also available as a 12-bit, two’s complement value over the
serial bus.
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MEMORY LOCATIONS
Memory Location Name of Location
60h Table Select Byte
61h Configuration Byte
62h Temperature MSB
DS1851
Function of Location
Writing to this byte determines which of the two
40x8 EEPROM look-up tables is selected for
reading or writing.
00h (Table 01h selected)
01h (Table 02h selected)
POL TAU TEN AEN
POL — Analog Updating
TAU — Temperature/Address Update
TEN — Temperature Update Enable
AEN — Address Update Enable
Default setting is 0Fh, TAU = 1, TEN = 1, and
AEN = 1.
POL = 1 until power is high enough to guarantee
outputs from the analog temperature converter.
Once POL = 0, automated updates will begin.
TAU becomes a 1 after a temperature and
address update has occurred as a result of a
temperature conversion. The user can write this
bit to 0 and check for a transition from 0 to 1 in
order to verify that a conversion has occurred.
If TEN = 0, the temperature conversion feature
is disabled. The user sets the DAC in manual
mode by writing to addresses 70h and
71h to control DAC-V and DAC-G, respectively.
With AEN = 0 the user can operate in a test
mode. Address updates made from the
temperature sensor will cease. The user can load
a memory location into 64h and verify that the
values in locations 70h and 71h are the expected
user-defined values.
This byte contains the MSB of the 12-bit 2’s
complement temperature output from the
temperature sensor.
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DS1851
Data valid: The state of the data line represents valid data when, after a START condition, the data line
is stable for the duration of the HIGH period of the clock signal. The data on the line can be changed
during the LOW period of the clock signal. There is one clock pulse per bit of data. Figures 3 and 4 detail
how data transfer is accomplished on the 2-wire bus. Depending upon the state of the R/W bit, two types
of data transfer are possible.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited and is determined
by the master device. The information is transferred byte-wise and each receiver acknowledges with a
ninth bit.
Within the bus specifications, a regular mode (100kHz clock rate) and a fast mode (400kHz clock rate)
are defined. The DS1851 works in both modes.
Acknowledge: Each receiving device, when addressed, generates an acknowledge after the reception of
each byte. The master device must generate an extra clock pulse that is associated with this acknowledge
bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is a stable low during the high period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into account. A master must signal an end-of-data to the slave
by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case,
the slave must leave the data line high to enable the master to generate the STOP condition.
1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is
the command/control byte, followed by a number of data bytes. The slave returns an acknowledge bit
after each received byte.
2) Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the
command/control byte) to the slave. The slave then returns an acknowledge bit. Next, follows a
number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit
after all received bytes other than the last byte. At the end of the last received byte, a ‘not
acknowledge’ can be returned.
The master device generates all serial clock pulses and the START and STOP conditions. A transfer is
ended with a STOP condition or with a repeated START condition. Since a repeated START condition is
also the beginning of the next serial transfer, the bus will not be released.
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