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PDF MC74LVX50 Data sheet ( Hoja de datos )
| Número de pieza | MC74LVX50 | |
| Descripción | HEX BUFFER | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC74LVX50
Hex Buffer
The MC74LVX50 is an advanced high speed CMOS buffer
fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: tPD = 4.1 ns (Typ) at VCC = 3.3 V
• Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 3.6 V Operating Range
• Low Noise: VOLP = 0.5 V (Max)
• Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
LVX50
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LVX
50
ALYW
1
14
1
14
SOEIAJ−14
M SUFFIX
CASE 965
74LVX50
ALYW
1
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 3
DataSheet4 U .com
1
Publication Order Number:
MC74LVX50/D
1 page  
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MC74LVX50
50%
A
tPLH
50% VCC
Y
VCC
GND
tPHL
Figure 3. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 4. Test Circuit
INPUT
Figure 5. Input Equivalent Circuit
EMBOSSED CARRIER DIMENSIONS (See Notes 9 and 10)
Tape
Size
B1
Max
D
D1
E
F
K
P
P0 P2 R
T
W
8 mm 4.35 mm
(0.179”)
12 mm 8.2 mm
(0.323”)
1.5 mm
+ 0.1
−0.0
(0.059”
+0.004
−0.0)
1.0 mm
Min
(0.179”)
1.5 mm
Min
(0.060)
1.75 mm
±0.1
(0.069
±0.004”)
3.5 mm
±0.5
(1.38
±0.002”)
5.5 mm
±0.5
(0.217
±0.002”)
2.4 mm
Max
(0.094”)
6.4 mm
Max
(0.252”)
4.0 mm
±0.10
(0.157
±0.004”)
4.0 mm
±0.10
(0.157
±0.004”)
8.0 mm
±0.10
(0.315
±0.004”)
4.0 mm
±0.1
(0.157
±0.004”)
2.0 mm
±0.1
(0.079
±0.004”)
25 mm
(0.98”)
30 mm
(1.18”)
0.6 mm
(0.024)
8.3 mm
(0.327)
12.0 mm
±0.3
(0.470
±0.012”)
16 mm 12.1 mm
(0.476”)
7.5 mm
±0.10
(0.295
±0.004”)
7.9 mm
Max
(0.311”)
4.0 mm
±0.10
(0.157
±0.004”)
8.0 mm
±0.10
(0.315
±0.004”)
12.0 mm
±0.10
(0.472
±0.004”)
16.3 mm
(0.642)
24 mm 20.1 mm
(0.791”)
11.5 mm
±0.10
(0.453
±0.004”)
11.9 mm
Max
(0.468”)
16.0 mm
±0.10
(0.63
±0.004”)
24.3 mm
(0.957)
9. Metric Dimensions Govern−English are in parentheses for reference only.
10. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
0.50 mm max. The component cannot rotate more than 10° within the determined cavity
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| PDF Descargar | [ Datasheet MC74LVX50.PDF ] | |
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