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MC74LVX240 fiches techniques PDF

Motorola Semiconductors - LOW-VOLTAGE CMOS

Numéro de référence MC74LVX240
Description LOW-VOLTAGE CMOS
Fabricant Motorola Semiconductors 
Logo Motorola Semiconductors 





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MC74LVX240 fiche technique
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal Bus Buffer
Inverting With 5V-Tolerant Inputs
The MC74LVX240 is an advanced high speed CMOS inverting 3–state
octal bus buffer and has two active low output enables. It is also designed
to work with 3–state memory address drivers, etc. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
High Speed: tPD = 4.3ns (Typ) at VCC = 3.3V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
VCC 2OE 1O0 2D0 1O1 2D1 1O2 2D2 1O3 2D3
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
1OE 1D0 2O0 1D1 2O1 1D2 2O2 1D3 2O3 GND
Figure 1. 20–Lead Pinout (Top View)
1
1OE
2
1D0
4
1D1
6
1D2
8
1D3
19
2OE
18
1O0
17
2D0
16
1O1
15
2D1
14
1O2
13
2D2
12
1O3
11
2D3
Figure 2. Logic Diagram
3
2O0
5
2O1
7
2O2
9
2O3
MC74LVX240
LVX
LOW–VOLTAGE CMOS
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
PIN NAMES
Pins
Function
nOE
1Dn, 2Dn
1On, 2On
Output Enable Inputs
Data Inputs
3–State Outputs
FUNCTION TABLE
INPUTS
1OE, 2OE 1Dn, 2Dn
LL
LH
HX
OUTPUTS
1On, 2On
L
H
Z
6/97
© Motorola, Inc. 1997
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