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IDT74LVC823A fiches techniques PDF

Integrated Device Technology - 3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

Numéro de référence IDT74LVC823A
Description 3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O
Fabricant Integrated Device Technology 
Logo Integrated Device Technology 





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IDT74LVC823A fiche technique
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IDT74LVC823A
3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP
3.3V CMOS 9-BIT
BUS-INTERFACE FLIP-FLOP
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
INDUSTRIALTEMPERATURERANGE
IDT74LVC823A
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
The LVC823A 9-bit bus-interface flip-flop is built using advanced dual
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
metal CMOS technology. The LVC823A device is designed specifically for
machine model (C = 200pF, R = 0)
driving highly capacitive or relatively low-impedance loads. The device is
• VCC = 3.3V ± 0.3V, Normal Range
particularly suitable for implementing wider buffer registers, I/O ports,
• VCC = 2.7V to 3.6V, Extended Range
bidirectional bus drivers with parity, and working registers.
• CMOS power levels (0.4µ W typ. static)
With the clock-enable (CLKEN) input low, the nine D-type edge-triggered
• Rail-to-rail output swing for increased noise margin
flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN
• All inputs, outputs, and I/O are 5V tolerant
high disables the clock buffer, latching the outputs. This device has
• Supports hot insertion
noninverting data (D) inputs. Taking the clear (CLR) input low causes the
• Available in SSOP, QSOP, and TSSOP packages
nine Q outputs to go low, independently of the clock.
A buffered output-enable (OE) input can be used to place the nine outputs
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
in either a normal logic state (high or low logic levels) or a high-impedance
state. OE does not affect internal operations of the latch. Previously stored
data can be retained or new data can be entered while the outputs are in
the high-impedance state.
The LVC823A has been designed with a ±24mA output driver. This
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
To ensure the high-impedance
state
during
power
up
or
power
downD, ataShee
DataSheettO4hUEe r.sechsooimsutlodrbies
tied to VCC through a pullup resistor; the minimum
determined by the current-sinking capability of the
value of
driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environment.
FUNCTIONAL BLOCK DIAGRAM
OE
CLR
CLKEN
1
11
14
CLK 13
1D 2
R
C1
1D
23 1Q
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
TO EIGHT OTHER CHANNELS
1
JANUARY 2004
DSC-4608/2

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IDT74LVC823A 3.3V CMOS 9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O Integrated Device Technology
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