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PDF ICS9169C-41 Data sheet ( Hoja de datos )
| Número de pieza | ICS9169C-41 | |
| Descripción | Frequency Generator | |
| Fabricantes | Integrated Circuit Systems | |
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Integrated
Circuit
Systems, Inc.
ICS9169C-41
Frequency Generator for PentiumPro™ Based Systems
General Description
Features
The ICS9169C-41 is a Clock Synthesize/Driver chip for • 12 selectable CPU/SDRAM/AGP clocks up to 75 MHz
Pentium, PentiumPro or Cyrix 68x86 based motherboards • Six PCI clocks, synchronous or asynchronous mode, pin
using SDRAM.
selectable by Bus Select input (pin 19)
• One USB clock at 48MHz, meets Intel jitter, accuracy, as
Features include four dual purpose I/O pins which provide
well as rise and fall time requirements
extra CPU clocks and enable the part to be packaged in a • One I/O clock at 24MHz
low-cost 34-pin SSOP package. These four pins latch the
select inputs at the internal Power-On Reset. Additionally,
•
Two Ref. Clocks at 14.318MHz
the device meets the Pentium and PentiumPro power-up • CPU clocks to PCI clock skew of 1-4ns (CPU early)
stabilization, which requires that CPU and PCI clocks be • Low CPU and PCI clock jitter <200ps
stable within 2ms after power-up.
• Low skew outputs, skew window 250ps for CPU clocks
and for PCI clocks
The ICS9169C-41 clock outputs are designed for low EMI
emissions. Controlled rise and fall times, unique output
•
Improved output drivers are designed for low EMI
driver circuits and innovative circuit layout techniques enable • Test Mode
the ICS9169C-41 to have lower EMI than other clock • 3.3V ±10% operation
devices.
• Space saving and low cost 34-pin SSOP package
The ICS9169C-41 accepts a 14.318MHz reference crystal or
clock as its input and runs from a 3.3V supply.
DataShee
Block Diagram
DataSheet4U.com
Pin Configuration
DataSheet4U.com
9169-41Rev D 5/02/00
34-Pin SSOP
Pentium is a trademark on Intel Corporation.
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
1 page  
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ICS9169C-41
Electrical Characteristics at 3.3V
VDD = 3.0 – 3.7 V, TA = 0 – 70° C unless otherwise stated
et4U.com
PARAMETER
Rise Time1
Fall Time1
Rise Time1
Fall Time1
Rise Time
Fall Time
Duty Cycle1
Jitter, One Sigma1
Jitter, Absolute1
Jitter, One Sigma1
Jitter, Absolute1
Jitter - Cycle to Cycle
Input Frequency1
Logic Input Capacitance1
Crystal Oscillator
Capacitance1
Power-on Time1
Frequency Settling Time1
Clock Skew1 (window)
Clock Skew1 (window)
AC Characteristics
SYMBOL
TEST CONDITIONS
Tr1 20pF load, 0.8 to 2.0V; All Except Ref
Tf1 20pF load, 2.0 to 0.8V; All Except Ref
Tr2 30pF load, 0.8 - 2.0V All Except Ref
Tf2 30pF load, 2.0 - 0.8V All Except Ref
Tr3 45pF; 0.8 - 2.0V; Ref only
Tf3 45pF; 2.0 - 0.8V; Ref only
Dt 20, 30, 45pF load @ VOUT=1.5V
Tj1s1 CPU & PCI Clocks
Tjab1 CPU & PCI Clocks (@ 60 & 66MHz)
Tj1s2 Ref & Fixed CLKs
Tjab2 Ref & Fixed CLKs
CPU Outputs
Tcc Fixed ClocksD&atRaESFh0eet4U.com
Fi
CIN Logic input pins
CINX
ton
ts
Tsk1
Tsk2
X1, X2 pins
From VDD=1.6V to 1st crossing of 66.6 MHz
VDD supply ramp < 40ms
From 1st crossing of acquisition to
<1% settling
CPU to CPU & PCI - PCI; Same Load; @1.5V
CPU(20pF) - PCI (30pF); @1.5V (CPU is
Early)
MIN
-
-
-
-
-
-
45
-
-250
-
-
-
-
12.0
-
-
-
-
-
1.0
TYP
0.9
0.8
1.3
1.3
1.7
1.0
50
50
-
1
1.0
290
4.5
14.318
5
18
MAX
1.2
1.2
1.6
1.6
2.0
2.0
55
150
250
3
2.5
350
6
16.0
-
-
UNITS
ns
ns
ns
ns
ns
ns
%
ps
ps
%
%
ps
%
MHz
pF
pF
1.9 2.0 ms
2.0 4.0 ms
188 300
ps
1.2 4.0 ns
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
DataShee
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