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PDF T71L6808A Data sheet ( Hoja de datos )
| Número de pieza | T71L6808A | |
| Descripción | Octal 10/100 Switch with Embedded Memory | |
| Fabricantes | Taiwan Memory Technology | |
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Preliminary T71L6808A
Octal 10/100 Switch
with Embedded Memory
The T71L6808A is an octal-port 10/100Mbps dual speed Ethernet switch integrated both with an
embedded SSRAM and a 1K entries of address table. A high performance Fast Ethernet switch,
fully complies with the IEEE802.3, 802.3u and 802.3x specifications, can be implemented using the
T71L6808A with physical devices. The T71L6808A is intended for applications to stand-alone
switch for low-cost SOHO market.
Features
Supports eight 10/100Mbps Ethernet ports with RMII interface
Fully non-blocking shared memory architecture using page-based embedded SSRAM.
Incorporating with the output private buffering scheme to prevent HOL (head of line) blocking
Wire-speed store-and-forward switching with low switching latency. Automatic address
learning, local frames filtering, and adjustable aging
Embedded 1K entries of look-up table
Supports full and half duplex operatiDoantsaSheet4U.com
Link, speed and duplex status are auto-detected via MDIO
Auto-negotiated Full-duplex flow control by writing the ability via MDIO to external PHY
Supports IEEE 802.3x flow control for full-duplex operation
Supports back-pressure flow control for half-duplex operation
Serial EEPROM interface for auto-configuration
Broadcast storm control
Port trunking & load sharing
Port-based VLAN
Port monitoring(snooping or mirroring)
Supports port priority per port basis QoS
Only one 50MHz OSC
128-pin PQFP, 3.3V CMOS technology
DataShee
DataSheet4U.comTaiwan Memory Technology, Inc. reserves the right P. 1
to change products or specifications without notice.
DataSheet4 U .com
Publication Date:May. 2001
Revision:0.A
1 page  
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Preliminary T71L6808A
RMII specification signals are as follows,
Signal Name Direction
Direction
(with respect (with respect to
to the PHY) the T71L6808A)
REFCLK
Input
Input
CRSDV
RXD[1:0]
TXEN
TXD[1:0]
Output
Output
Input
Input
Input
Input
Output
Output
Use
Synchronous clock reference for receive,
transmit and control interface.
Carrier Sense/Receive Data Valid
Receive Data
Transmit Enable
Transmit Data
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Data Reception
The data reception port will go into the receive-state when CRS in the RMII interface is asserted.
The RMII (Reduced Media Independent Interface) presents the received data in two-bit (di-bit) that
are synchronous to the RMII reference clock (50 MHz). The T71L6808A will then attempt to detect
the occurrence of the SFD (Start Frame Delimiter) pattern “10101011.” All preamble data prior to
SFD are discarded. Once SFD is detected from the RMII interface, the frame data is forwarded and
stored in the buffer of the switch.
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Illegal Frames
The T71L6808A will discard all illegal frames such as runt packet (less than 64 bytes), oversize
packet (greater than 1518 or 1522 bytes) and bad CRC.
Frame Forwarding
After a packet is received, both source address (SA) and destination address (DA) are retrieved. The
SA is used to update the port’s address table and the DA is used to determine the frames destination
port. The Address Resolution Logic will attempt to match the destination address with the addresses
stored in the address table and then forwards the packet to the other port, if appropriate.
If the first bit of the destination address is “0,” the frame is regarded as an unicast packet. The
Address Resolution Logic uses address hashing algorithm or direct mapping method to search
destination address and returns a matched destination port number to identify which port the packet
should be forwarded to. If the destination port is within the same VLAN of the receiving port, the
packet will be forwarded. If the destination port does not belong to the VLANs specified at the
receiving ports, the packet will be discarded.
DataSheet4U.comTaiwan Memory Technology, Inc. reserves the right P. 5
to change products or specifications without notice.
Publication Date:May. 2001
Revision:0.A
DataSheet4 U .com
DataShee
5 Page 
www.DataSheet4U.com
tm TE
CH
Preliminary T71L6808A
et4U.com
DataSheet4U.com
DataShee
DataSheet4U.comTaiwan Memory Technology, Inc. reserves the right P. 11
to change products or specifications without notice.
DataSheet4 U .com
Publication Date:May. 2001
Revision:0.A
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet T71L6808A.PDF ] | |
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