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Toshiba Semiconductor - 9-BIT PARITY GENERATOR CHECKER

Numéro de référence TC74AC280F
Description 9-BIT PARITY GENERATOR CHECKER
Fabricant Toshiba Semiconductor 
Logo Toshiba Semiconductor 





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TC74AC280F fiche technique
TC74AC280P/F/FN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74AC280P,TC74AC280F,TC74AC280FN
9-Bit Parity Generator/Checker
The TC74AC280 is an advanced high speed CMOS 9-BIT
PARITY GENERATOR fabricated with silicon gate and
double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The TC74AC280 is composed of nine data inputs (A thru I) and
odd/even parity outputs(Σ ODD and Σ EVEN).
The odd parity output is high when an odd number of data
inputs are high. The even parity output is high when an even
number of data inputs are high.
The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 7.8 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50 Ω
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2~5.5 V
Pin and function compatible with 74F280
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74AC280P
TC74AC280F
TC74AC280FN
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
NC: No connection
1
2007-10-01

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