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PDF TC74AC377P Data sheet ( Hoja de datos )
| Número de pieza | TC74AC377P | |
| Descripción | OCTAL D-TYPE FLIP-FLOP | |
| Fabricantes | Toshiba Semiconductor | |
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TC74AC377P/F/FW
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74AC377P,TC74AC377F,TC74AC377FW
Octal D-Type Flip-Flop
The TC74AC377 is an advanced high speed CMOS OCTAL
D-TYPE FLIP FLOP fabricated with silicon gate and double-layer
metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This 8-bit D-type flip-flop is controlled by a clock input (CK)
and an enable input ( G )
The signal level applied to the D inputs are transferred to Q
outputs during the positive going transition of CK.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74AC377P
TC74AC377F
Features
• High speed: fmax = 140 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 8 µA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50 Ω
transmissioDnalitnaeSsh. eet4U.com
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F377
Pin Assignment
TC74AC377FW
DataShee
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Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
SOP20-P-300-1.27
SOL20-P-300-1.27
: 1.30 g (typ.)
: 0.22 g (typ.)
: 0.22 g (typ.)
: 0.46 g (typ.)
1 2006-02-01
1 page  
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Timing Requirements (input: tr = tf = 3 ns)
Characteristics
Symbol
Minimum pulse width
(CK)
Minimum set-up time
(D-CK)
Minimum set-up time
( G -CK)
Minimum hold time
tW (L)
tW (H)
ts
ts
th
TC74AC377P/F/FW
Test Condition
⎯
⎯
⎯
⎯
VCC (V)
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
Ta =
25°C
Limit
Ta =
−40 to
85°C
Limit
8.0 8.0
5.0 5.0
8.0 8.0
4.0 4.0
9.0 9.0
4.0 4.0
1.0 1.0
1.0 1.0
Unit
ns
ns
ns
ns
et4U.com
AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
(CK-Q)
Maximum clock
frequency
Input capacitance
Power dissipation
capacitance
Symbol
tpLH
tpHL
fmax
CIN
CPD
(Note)
Test Condition
VCC (V)
Ta = 25°C
Min Typ. Max
3.3 ± 0.3 ⎯ 10.6 17.6
⎯
5.0 ± 0.5 ⎯
7.4 10.6
⎯
⎯
3.3 ± 0.3 50 95 ⎯
5.0 ± 0.5 80 140 ⎯
⎯ 5 10
Data⎯Sheet4U.com ⎯ 30 ⎯
Ta = −40 to
85°C
Min Max
Unit
1.0 20.0
1.0 12.0
ns
50 ⎯
MHz
80 ⎯
⎯ 10 pF
⎯ ⎯ pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC/8 (per F/F)
And the total CPD when n pcs. of flip flop operate can be gained by the following equation:
CPD (total) = 20 + 10･n
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5 2006-02-01
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet TC74AC377P.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TC74AC377 | dvanced high speed CMOS OCTAL D-TYPE FLIP-FLOP fabricated | Toshiba Semiconductor |
| TC74AC377F | OCTAL D-TYPE FLIP-FLOP | Toshiba Semiconductor |
| TC74AC377FW | OCTAL D-TYPE FLIP-FLOP | Toshiba Semiconductor |
| TC74AC377P | OCTAL D-TYPE FLIP-FLOP | Toshiba Semiconductor |
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