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PDF TC74AC139F Data sheet ( Hoja de datos )

Número de pieza TC74AC139F
Descripción DUAL 2 - TO - 4 LINE DECODER
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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TC74AC139P/F/FN/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74AC139P,TC74AC139F,TC74AC139FN,TC74AC139FT
Dual 2-to-4 Line Decoder
The TC74AC139 is an advanced high speed CMOS 2-to-4 LINE
DECODER fabricated with silicon gate and double-layer metal
wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The active low enable input can be used for gating or it can be
used as a data input for demultiplexing applications.
When the enable input is held “H”, all four outputs are fixed at
a high logic level independent of the other inputs.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 5.9 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 µA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Symmetrical output impedance:
|IOH| = IOL = 24 mA (min) Capability of driving 50
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL DataSheet4U.com
Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
Pin and function compatible with 74F139
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74AC139P
TC74AC139F
Pin Assignment
1G 1
1A 2
1B 3
1Y0 4
1Y1 5
1Y2 6
1Y3 7
GND 8
(top view)
16 VCC
15 2G
14 2A
13 2B
12 2Y0
11 2Y1
10 2Y2
9 2Y3
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Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOP16-P-300-1.27
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
1
D a t a S h e4e tU . c o m
TC74AC139FN
TC74AC139FT
2006-02-01
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TC74AC139F pdf
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Package Dimensions
TC74AC139P/F/FN/FT
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Weight: 1.00 g (typ.)
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