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PDF UT54LVDS032 Data sheet ( Hoja de datos )
| Número de pieza | UT54LVDS032 | |
| Descripción | Quad Receiver | |
| Fabricantes | Aeroflex Circuit Technology | |
| Logotipo |  |
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Standard Products
UT54LVDS032 Quad Receiver
Data Sheet
May 22, 2003
FEATURES
INTRODUCTION
q >155.5 Mbps (77.7 MHz) switching rates
q +340mV differential signaling
q 5 V power supply
q TTL compatible outputs
q Ultra low power CMOS technology
q 8.0ns maximum propagation delay
q 3.0ns maximum differential skew
q Radiation-hardened design; total dose irradiation testing to
MIL-STD-883 Method 1019
- Total-dose: 300 krad(Si)and 1Mrad(Si)
- Latchup immune (LET > 111 M eV-cm2/mg)
q Packaging options:
- 16-lead flatpack (dual in-line)
q Standard Microcircuit Drawing 5962-95834
The UT54LVDS032 Quad Receiver is a quad CMOS
differential line receiver designed for applications requiring
ultra low power dissipation and high data rates. The device
is designed to support data rates in excess of 155.5 Mbps
(77.7 MHz) utilizing Low Voltage Differential Signaling
(LVDS) technology.
The UT54LVDS032 accepts low voltage (340mV)
differential input signals and translates them to 5V TTL
output levels. The receiver supports a three-state function
that may be used to multiplex outputs. The receiver also
supports OPEN, shorted and terminated (100 Ω) input fail-
safe. Receiver output will be HIGH for all fail-safe
conditions.
The UT54LVDS032 and companion quad line driver
UT54LVDS031 provides new alternatives to high power
pseudo-ECL devices for high speed point-to-point interface
applications.
- QML Q and V compliant part
q Compatible with IEEE 1596.3SCI LVDS
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q Compatible with ANSI/TIA/EIA 644-1996 LVDS Standard
DataShee
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RIN1+
RIN1-
+
R1
-
ROUT1
RIN2+
RIN2-
+
R2
-
ROUT2
RIN3+
RIN3-
+
R3
-
ROUT3
RIN4+
RIN4-
EN
EN
+
R4
-
ROUT4
Figure 1. UT54LVDS032 Quad Receiver Block Diagram
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DC ELECTRICAL CHARACTERISTICS 1
(VDD = 5.0V +10%; -55°C < TC < +125°C)
SYMBOL
PARAMETER
VIH High-level input voltage
VIL Low-level input voltage
VOL Low-level output voltage
VOH High-level output voltage
IIN Logic input leakage current
et4U.com
V
3
TH
VTL 3
II
IO
4
Z
VCL
IOS3
ICC4
ICCZ 4
Differential Input High Threshold
Differential Input Low Threshold
Receiver input Current
Output Three-State Current
Input clamp voltage
Output Short Circuit Current
Loaded supply current receivers
enabled
Loaded supply current receivers
disabled
(TTL)
CONDITION
(TTL)
IOL = 2mA, VDD = 4.5V
IOH = -0.4mA, VDD = 4.5V
Inputs, VIN = 0 and 2.4V, V CC = 5.5
Enables = EN/EN= 0 and 5.5V,
VCC = 5.5
VCM = +1.2V
VCM = +1.2V
VIN = 2.4V
Disabled, VOUT = 0 V or VDD
ICL = +/-18mA
Enabled, VOUT = 0 V2
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EN, EN = VDD or VSS
Inputs Open
EN = VSS, EN = VDD
Inputs Open
MIN
2.0
4.0
-10
-10
-100
-10
-10
-1.5
-15
MAX
0.8
0.3
+10
+10
UNIT
V
V
V
V
µA
+100
+10
+10
1.5
-130
11
mV
mV
µΑ
µΑ
V
mA DataShee
mA
mA
11
Notes:
1. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground.
2. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not excee d
maximum junction temperature specification.
3. Guaranteed by characterization.
4. Device tested at VCC = 5.5V only.
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UT54LVDS032 QUAD RECEIVER: SMD
5962 - 95834 ** * * *
Lead Finish:
(A) = Hot solder dipped
(C) = Gold
(X) = Factory Option (gold or solder)
Case Outline:
(X) = 16 lead Flatpack (dual-in-line)
Class Designator:
(Q) = QML Class Q
(V) = QML Class V
Device Type
02 = LVDS Receiver
et4U.com
Drawing Number: 95834
Total Dose
(R) = 1E5 rad(Si)
(F) = 3E5 rad(Si)
(G) = 5E5 rad(Si)
(H) = 1E6 rad(Si)
Federal Stock Class Designator: No Options
Notes:
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1.Lead finish (A,C, or X) must be specified.
2.If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3.Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening.
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