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Toshiba Semiconductor - OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT

Numéro de référence TC74LVX573FW
Description OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT
Fabricant Toshiba Semiconductor 
Logo Toshiba Semiconductor 





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TC74LVX573FW fiche technique
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TC74LVX573F/FW/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LVX573F,TC74LVX573FW,TC74LVX573FT
Octal D-Type Latch with 3-State Output
The TC74LVX573F/ FW/ FT is a high-speed CMOS octal latch
with 3-state output fabricated with silicon gate CMOS technology.
Designed for use in 3-V systems, it achieves high-speed operation
while maintaining the CMOS low power dissipation.
This device is suitable for low-voltage and battery operated
systems.
This 8 bit D-type latch is controlled by a latch enable input
(LE) and a output enable input (OE). When the OE input is high,
the eight outputs are in a high-impedance state.
An input protection circuit ensures that 0 to 5.5V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74LVX573F
TC74LVX573FW
Features
· High speed: tpd = 6.4 ns (typ.) (VCC = 3.3 V)
· Low-power dissipation: ICC = 4 µA (max) (Ta = 25°C)
· Input voltage level: VIL = 0.8 V (max) (VCC = 3 V)
www.DataSheet4U.comVIH = 2.0 V (min) (VCC = 3 V)
TC74LVX573FT
· Power-down protection provided on all inputs
· Balanced propagation delays: tpLH tpHL
· Low noise: VOLP = 0.8 V (max)
· Pin and function compatible with 74HC573
Weight
SOP20-P-300-1.27: 0.22 g (typ.)
SOL20-P-300-1.27: 0.46 g (typ.)
TSSOP20-P-0044-0.65: 0.08 g (typ.)
DataSheet4 U .com
1 2002-01-16
www.DataSheet4U.com

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